ESS Sabre Reference DAC (8-channel)

Most of Japanese ES9018 based DIY DAC users favor "the Lowest" setting of DPLL Bandwidth Parameter for I2S/DSD.
One of my friend says "No bandwidth" setting for DSD512 is the best though the play is not stable.
As for me, I like a DSD256 play of synchronous master clock of 90.3168 MHz/98.304 MHz the best within the range of my experiences. When I listened to a DSD256 sound for the first time, I felt a certain "breakthrough" and convinced a clear and great advantage of ES9018.

I'd like to recommend you learn how to set register values and make your explorations.
"glt" is kindly and generously offering both wonderful compilation of necessary information and his smart Arduino code for that purpose on his blog articles.
 
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Hi Bunpei

As I wrote before about this subject (and repeat now), I made my experiments on an ESS9018 planted in Oppo player (BDP95). That because I have no answer to your question for now. I do not know how Oppo`s firmware has set up the DAC registry.
I will for sure repeat all those experiments on an Buffalo board, and I will for sure look at this aspect with the set up of the chip registries. It may happen in this year most likely. I will go deeper in those things, but for now I have some problems with the time...
But, I may repeat too, in that conditions Oppo have wrote the DAC firmware and set it up the registry, I have registered improvements using 125Mhz SAW oscillator.

Anyway, I just wonder why the DIY people who have already the experience and the adequate tools, do not try to understand why it may be improvements this way(s) of using this exceptional DAC chip. It will be a huge contribution for all of us, will save much time and work for they who may be new in this registry control of ESS9018.

You for example, could you help us very much if you will accept to solder an SAW in your system, or an 125Mhz one, read the registry , or set it up accordingly, try to see why it sounds better this way... and eventual come back here with your results/conclusions...
It couldn`t be nice?
 
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Hi, Coris,

As I wrote before about my thought, on my post in another thread,
http://www.diyaudio.com/forums/digital-line-level/196474-ess9018-try-new-try-more-14.html#post2819016
http://www.diyaudio.com/forums/digital-line-level/147817-ackodac-based-es9018-70.html#post3348012
(and repeat now), I will not make my experiments other than a synchronous clocking.

I think it's better for you to make your experimental conditions clear at least before you present your subjective results on this thread.

Bunpei
 
Most of Japanese ES9018 based DIY DAC users favor "the Lowest" setting of DPLL Bandwidth Parameter for I2S/DSD.
One of my friend says "No bandwidth" setting for DSD512 is the best though the play is not stable.
As for me, I like a DSD256 play of synchronous master clock of 90.3168 MHz/98.304 MHz the best within the range of my experiences. When I listened to a DSD256 sound for the first time, I felt a certain "breakthrough" and convinced a clear and great advantage of ES9018.

I'd like to recommend you learn how to set register values and make your explorations.
"glt" is kindly and generously offering both wonderful compilation of necessary information and his smart Arduino code for that purpose on his blog articles.

"no bandwidth" in asynch is VERY stable: "no sound at all" :)

I think Bunpei is on the right track, changing clock speed may affect other parameters such as the dpll settings, the quantization noise, filter performance, etc. With Arduino you could adjust those parameters and determine what is best...
 
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"no bandwidth" in asynch is VERY stable: "no sound at all" :)

I think Bunpei is on the right track, changing clock speed may affect other parameters such as the dpll settings, the quantization noise, filter performance, etc. With Arduino you could adjust those parameters and determine what is best...

And also the clock speeds can be changed if you add clocks and control for that...

I run with clocks at 22/24M, 45/49M and 90/98M...
The fun of it is that the register settings that gives the best fidelity are identical for all clock speeds.
And even greater fun is it that it is the lowest clock speeds gives the best fidelity.

I have for sure tested clocks above 100MHz - and they was the identical 1ps jitter clocks that I have in the lower speeds.
I gave the overspeed clocks some days to settle before they was removed.
I cannot understand why the increased noise and reduced fidelity are preferred by some individuals, but it is for sure different...
 
And also the clock speeds can be changed if you add clocks and control for that...

I run with clocks at 22/24M, 45/49M and 90/98M...
The fun of it is that the register settings that gives the best fidelity are identical for all clock speeds.
And even greater fun is it that it is the lowest clock speeds gives the best fidelity.

I have for sure tested clocks above 100MHz - and they was the identical 1ps jitter clocks that I have in the lower speeds.
I gave the overspeed clocks some days to settle before they was removed.
I cannot understand why the increased noise and reduced fidelity are preferred by some individuals, but it is for sure different...



On the crystal front all things being equal , the lowest phase noise offset at say 10Hz (important metric for jitter performance) is always lower on crystal oscillators which are lower in frequency, phase noise increases with increasing oscillator frequency. Maybe this explains what your hearing .
 
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I'm afraid your question is too simplified and non-definitive.
Within my limited experiences and based on my subjective criteria, the optimum fs are;
DSD: 11.2896 MHz
PCM: 352.8 kHz

On the other hand, sound quality of 44.1 kHz is also very high.

I'm trying to make sense of the broadly different results - and I thought maybe somewhere between 512fs to 1024fs there is a sweet spot, so for 44.1Khz, we'd want a mclk between 22.5792Mhz and 45.1584Mhz. But maybe there is no sweet spot. :( Not that it matters - I prefer asynch with 50Mhz saw to synch with 45.1584Mhz Fox Xpresso, so that's what I'm gonna stick with.

Everybody gets to choose their own flavour. :) Raspberry ripple please ! :usd:
 
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On the crystal front all things being equal , the lowest phase noise offset at say 10Hz (important metric for jitter performance) is always lower on crystal oscillators which are lower in frequency, phase noise increases with increasing oscillator frequency. Maybe this explains what your hearing .

However, manufacturer of crystal declares phase noise performance limit for frequency higher than used here of 100MHz
 
... I prefer asynch with 50Mhz saw to synch with 45.1584Mhz Fox Xpresso, so that's what I'm gonna stick with ...

In my definition of "synchronous master clocking", a transport shares the identical master clock oscillator with ES9018 DAC and it generates synchronous I2S/DSD signals based on the master clock.
Is your Fox Xpresso 45.1584 MHz used as a master clock for your transport?
 
In my definition of "synchronous master clocking", a transport shares the identical master clock oscillator with ES9018 DAC and it generates synchronous I2S/DSD signals based on the master clock.
Is your Fox Xpresso 45.1584 MHz used as a master clock for your transport?

Yes, it is a CM6631A usb transport. 24bit 192kHz USB to I2S PCB CM6631/A w/Ultralow noise 6.5uV regulator for ES9018 | eBay

Fox Xpresso is okay, not great, so I think that is why synch is not as good as asynch SAW. And it could be my soldering the u.fl cable too.
 
Hi, KlipschKid,

I appreciated your clarification!

FOX Xpresso is a good commodity level product.
However, I think it's not of a grade commensurate with the quality of ES9018.
I'd like to recommend such replacements with Crystek or NDK oscillator and applying such a low noise voltage regulator as TPS7A4700 or ADP151, dedicated only to the oscillator device.
 
Hi Bunpei,

My DAC uses adp151 ( for 3.3V and 1.2V and an AMB sigma11 psu @ 3,8V for AVCC ) and I have tried 22.5792Mhz CCHD-957 in asynch too. It only worked for 44.1khz and 48Khz, but still the saw is slightly better, or perhaps I should say, I prefer the SAW.

The CM6631A uses one LP5900 6.5uV noise for the xo's and another LP5900 for the CM6631A IC. It's not powered from the USB. It has its own low noise 5V supply as pre-regulators for the LP5900.

So I'm quite sure SAW is a good xo for ES9018.

I could remove the 45Mhz from the cm6631 and put in an NDK, but my skills are poor and I think I might damage the cm6631 pcb.

cheers
 
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Bunpei, what is the simplest solution to get a DSD source signal and where to find DSD files?

For getting a DSD source signal;
Plan A: Amanero Combo384 Module
Plan B: Hacking a SACD or Blu-ray player of Sony or Oppo of reasonable prices and tapping DSD signals

Where to find DSD files;
Plan A(above): Downloading from a web sites of 2L, Blue Cost Records, e-Onkyo etc. Converting from PCM sources by using Korg AudioGate software
Plan B(above): In your SACDs
 
And also the clock speeds can be changed if you add clocks and control for that...

I run with clocks at 22/24M, 45/49M and 90/98M...
The fun of it is that the register settings that gives the best fidelity are identical for all clock speeds.
And even greater fun is it that it is the lowest clock speeds gives the best fidelity.

I have for sure tested clocks above 100MHz - and they was the identical 1ps jitter clocks that I have in the lower speeds.
I gave the overspeed clocks some days to settle before they was removed.
I cannot understand why the increased noise and reduced fidelity are preferred by some individuals, but it is for sure different...

This makes the most sense to me. Synchronous operation, lowest speed
clock possible. What clocks are you using?

Have you tried OS filter disabled?