DIY cinema processor - requirements, preferences, opinions, ideas ?

What extra features would the hacked AVR + the DIY cinema processor combo offer compared to the original non-hacked AVR?

The processing chip I'm planning to use (STA309A/STA311B) has 10 biquads per "processor channel". Setting aside 2/10 for crossover duties, 8/10 would still be left for paraEQ purposes. Now, let us consider an example where processor channels 1&2 are setup for 2-way reproduction of the 'L (left)' decoder channel using a 4th order Linkwitz Riley slope at 1kHz:

Ch1: L(low band)
Biquads 1 & 2 : 2nd order Butterworth lowpass, 1kHz corner. ( LinkRiley = Butter^2 )
Biquads 3 - 10: ParaEQ x 8

Ch2: L(high band)
Biquads 1 & 2 : 2nd order Butterworth highpass, 1kHz corner.
Biquads 3 - 10: ParaEQ x 8

It is fairly easy to see from the above, that the effective processing power available (apart from crossover) for the L (left) channel is equal to 8+8=16 paraEQ. Now, even if one chooses to perform a 6th/8th order crossover, he would still be left with enough paraEQ to carry out the best room / speaker compensation schemes available. The delay lines in each channel would also allow for precise time-alignment required for excellent multi-way reproduction.

Isn't that all the processing one would ever need to run a home cinema system?
 
I went ahead with the hardware decoder chip in hand while also including I2S input ports for external decoding solutions. The PCM1680/1 DAC was easy while the new ESS chip looked less friendly and hard to locate.

Attached below are the component placements for the top/bottom layers and ground plane layer (routing layers not shown).
 

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Also, my schematics are similar to the datasheet reference circuits given by the respective manufacturers. Will be reviewing the files for any mistakes / improvements / modifications for few more days before sending it out for printing.

Please point out any potential issues you might find with the layout etc., thanks.
 
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Got the PCB fabricated and partially populated (picture) for checking decoder stage operation. Since the DACs have not been populated, the analogue audio for the testing (for now) comes from filtering the DDX outputs of the processor chip.

So far, everything seems to be working as expected, with the decoder being able to detect, decode and also report the details of audio formats, as shown in the video (attached, rename to MP4 after downloading).
 

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Managed to design a simple, clutter-free GUI template for JHD12864E, the description for which is attached below (pdf). Also attached is a browser-based (mock) interface for anyone interested in experiencing the layout / navigation of the same. The actual GUI, operated similarly, using a remote control, is currently under testing.

Usage:
1) Extract the zip file to a folder and open "Index.htm". Use Mozilla Firefox for best results (developed on 52.9.0, 32-bit).
2) Explanations are in the accompanying pdf file.
 

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The unit is ready after almost a year !!

  • The SMPS used in the testing stage has been ditched in favour of a transformer power supply for better EMI performance (waveforms attached).
  • In order to assess the decoding fidelity as well, the 48kHz/16-bit DTS-1536kbps format was used during sine-wave testing.
  • A video demonstrating the filter save/recall features of the unit is also attached (rename file to *.MP4 after downloading).
A special thanks to all the members who participated in the STA310 thread (link here), which enabled implementation of the decoder section.
 

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  • Rename to MP4.txt
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