Hi,
maybe several reasons..
i'd just checked my MC7 simulation for 700khz D amp, 10khz, 60khz bandwidth:
A) THD_max step-1ns_cutoff by 1Kohm to 1nf (-.5db at 60khz)_FFT only for second sinusoidal period
to avoid initial, non-periodic transients.@.005%, actually it's only 3th harmonic.
B) same, but without cutoff@.006%,
how mentioned Pabo, EWB have much more filtering troubles.
C) like case B) but max step-10ns@.006%
D) like case B) but max step-100ns@.07%, funny- 3th is still .005%
E) like case B) but max step-1us@.6%
F) like case A) but max step-1us@.3%
G) like case A) but entire time range, ie non-periodic transients are included@110%,
if the initial click isn't seen even..this rather does exist then doesn't.
Usually, for class D, i've from .7 to .25 MC7/reality THD ratio, and more power makes lower ratio because i didn't try to simulate decoupling/stargrounding components, actually, my statistics is pretty poor so far. My first D amp had half bridge, .5-1us dead time, 50-100khz, PWM, without feedback..i don't remember exactly, it was THD 5-10%@100hz 100w 4ohm or so. Same circuit with feedback loop before filter had .5% etc..
maybe several reasons..
i'd just checked my MC7 simulation for 700khz D amp, 10khz, 60khz bandwidth:
A) THD_max step-1ns_cutoff by 1Kohm to 1nf (-.5db at 60khz)_FFT only for second sinusoidal period
to avoid initial, non-periodic transients.@.005%, actually it's only 3th harmonic.
B) same, but without cutoff@.006%,
how mentioned Pabo, EWB have much more filtering troubles.
C) like case B) but max step-10ns@.006%
D) like case B) but max step-100ns@.07%, funny- 3th is still .005%
E) like case B) but max step-1us@.6%
F) like case A) but max step-1us@.3%
G) like case A) but entire time range, ie non-periodic transients are included@110%,
if the initial click isn't seen even..this rather does exist then doesn't.
Usually, for class D, i've from .7 to .25 MC7/reality THD ratio, and more power makes lower ratio because i didn't try to simulate decoupling/stargrounding components, actually, my statistics is pretty poor so far. My first D amp had half bridge, .5-1us dead time, 50-100khz, PWM, without feedback..i don't remember exactly, it was THD 5-10%@100hz 100w 4ohm or so. Same circuit with feedback loop before filter had .5% etc..
I think it may increase distortion but probably stay less than non-feedback circuitry, for the most part, unless I am not seeing things right. best regards
subwo1 said:
No argument here at all. However what you stated was most valuble indeed. Certainly gives me a more in depth understanding on the importance of minimising dead times, other than the more obvious, at a glance, cross over distortion effect it produces.
Perhaps we should starve any chance of a feedback vs no feedback debate here by re-stating it as feedback can contribute to the effect of dead time induced distortion, with the cure still being the obvious one of having minimal dead time.
I understand the Mueta IC will incorporate some sort of adaptive dead time according to power level..
Is dead time generally greater for higher power levels? I guess in order to account for the harder to switch high power devices?
This leaves alot to be said for Crown's BCA topology doesn't it.
Hmmmmmm....... BCA-UCD hybrid ...here comes the bride! 😀
Thanks,
Chris
The precision to which the two duty cycles (top and bottom) have to be matched is the same as for dead time. The effect of overlap (sum of duty cycles >100%) is also too much idle current. The effect of nonoverlap (sum of duty cycles <100%) is also similar: distortion.classd4sure said:
BCA does not substantially solve the timing distortion problem. The only thing it does solve is EMI issues related with hard takeover (shoothrough current and/or recovery current). Also reliability problems that can occur with very-high-power stages and diode recovery are removed. The same improvement can be had with ordinary current steering diodes though.
Overall the effect isn't worth the extra complication. But, you know, class D folks like to invent "technologies" and attach their ego to it. To this end they gloss over the fact that they didn't really solve a problem (Mr. T, shrp1bit, deedee-ex, ...)
Unfortunately it keeps them from making real progress, because telling they've got something better means the original idea wasn't so wonderful after all.
Super explanation, Bruno and the sentiment, "Overall the effect isn't worth the extra complication." cannot be overstated concerning design work, IMO.
... and others from huge profits 😉
Apart from my cynism (you have to do things like that every now and then because it is sooo refreshing): A circuit that precisely measures and controls deadtime might be desirable.
OTOH deadtime induced distortion is not that severe as those suggest who don't like class-d. It would not reach the levels of an unbiased "linear" output stage.
Regards
Charles
Hello,
@Bruno, I knew I could lure you in here 🙂 Welcome! Every good father has to put up a fight when his offspring is about to married off to some, undeserving ....pauper from the wrong side of the tracks.
I admitt, when I said that I was half joking ..(only half), and a very quick review of the BCA patent, which I hadn't bothered with before, dismissed that idea as quickly as it came.
Why? I realised what you said about the timing, not solving that issue at all, far from it. Why else? Ahhhh.....the complication...not even worth considering.
Why else again? Your UCD is about as perfect dead time wise as I can imagine so far, would be hard to improve on, and I've been trying, but I can't find even a single flaw. Shoot through seems non existant with it. Surely this must beat any sort of an adaptive dead time abomination.
I was reading up on ECL last night thinking here I go....I will find an improvement to be had...hahaha.....foolish me.
I am curious however, how well UCD could be made to work using a MAX9690. Functionally it seems identical, although it would limit some options we have with your comparator.
I'm not at all saying it would improve anything, but it's something a diy hack like myself could wire up in 5 minutes, with even less complication, and fewer parts.
Anyway, thanks for your informed response, of course you're 100% on target.
Regards,
Chris
PS: Sharp1bit.....still a good laugh....$20k LIE. tsk...wonder how many they sold.
@Bruno, I knew I could lure you in here 🙂 Welcome! Every good father has to put up a fight when his offspring is about to married off to some, undeserving ....pauper from the wrong side of the tracks.
I admitt, when I said that I was half joking ..(only half), and a very quick review of the BCA patent, which I hadn't bothered with before, dismissed that idea as quickly as it came.
Why? I realised what you said about the timing, not solving that issue at all, far from it. Why else? Ahhhh.....the complication...not even worth considering.
Why else again? Your UCD is about as perfect dead time wise as I can imagine so far, would be hard to improve on, and I've been trying, but I can't find even a single flaw. Shoot through seems non existant with it. Surely this must beat any sort of an adaptive dead time abomination.
I was reading up on ECL last night thinking here I go....I will find an improvement to be had...hahaha.....foolish me.
I am curious however, how well UCD could be made to work using a MAX9690. Functionally it seems identical, although it would limit some options we have with your comparator.
I'm not at all saying it would improve anything, but it's something a diy hack like myself could wire up in 5 minutes, with even less complication, and fewer parts.
Anyway, thanks for your informed response, of course you're 100% on target.
Regards,
Chris
PS: Sharp1bit.....still a good laugh....$20k LIE. tsk...wonder how many they sold.
I once heard it and I must admit that it wasn't that bad at all soundwise. OTOH it is a lot of effort construction- and money-wise compared to the outcome.
But delta-sigma as such doesn't seem to be that bad at all. I did simulations on a DS amp and it was particularily good at suppression of IMD. But it would definitely take more effort to implement it than an UCD. OTOH for mass production it could be easily integrated.
Regards
Charles
phase_accurate said:
Hi Charles,
MmmmmmmHmmmmm... From what I've seen everyone who's heard it admits the same, which personally I find encouraging that a bad design with bad specs can still sound nice.
My problem with it:
They went a little beyond "marketing hoopla" by saying it's a true digital amplifier, complete lie, and shame on alot of the reviewers who didn't catch that.
My other problem with it: $20k, that's insane, and for that much, it should sound alot better than "not bad".
It's ugly too! 🙂
Personally when it comes to such things, a little honesty regarding what makes it tick, and why, can go a long long way.
Buyer Beware.
Regards,
Chris
Hi IVX,
Thanks for sharing your experiences with the simulations and real circuits in comparison form. I found it enlightening especially since I lack the chance to do such detailed analyses. I wouldn't mind studying the combined efforts of the DIYaudio community and construct a refined design which I theoretically understand so well that it is as though I have been bread boarding and experimenting with it myself.
Hi Chris;
yes, buyer beware.
Thanks for sharing your experiences with the simulations and real circuits in comparison form. I found it enlightening especially since I lack the chance to do such detailed analyses. I wouldn't mind studying the combined efforts of the DIYaudio community and construct a refined design which I theoretically understand so well that it is as though I have been bread boarding and experimenting with it myself.
Hi Chris;
yes, buyer beware.
Hi there,
Yeah IVX had a nice contribution, I'm still trying to make some more sense of it. My thanks to IVX as well.
Ahhhhhh.......I was dreaming of a community colaborative effort for much the same purpose (think Borg and their advanced technology ). That might be asking a bit much though.
Hopefully this thread will turn into something everyone (or almost) can benefit from for their designs/efforts.
Right now I'm looking for a model of a Max9690 or a similar part...I....have...to know
Regards,
Chris
Yeah IVX had a nice contribution, I'm still trying to make some more sense of it. My thanks to IVX as well.
Ahhhhhh.......I was dreaming of a community colaborative effort for much the same purpose (think Borg and their advanced technology ). That might be asking a bit much though.
Hopefully this thread will turn into something everyone (or almost) can benefit from for their designs/efforts.
Right now I'm looking for a model of a Max9690 or a similar part...I....have...to know
Regards,
Chris
...love this thread. Unfortunately, I was not able to go ahead with my
design considerations.... But I'll keep tracking this thread!
Great, thanks!!!
Bye
Markus
design considerations.... But I'll keep tracking this thread!
Great, thanks!!!
Bye
Markus
The Max9690 has some appealing characteristics. You may be able to sub something like an LT1116 into the circuit. Then you may have an excuse to acquire LTspice to use for simulations since such models would then be readily available. I think that that LT comparator could give lower distortion, depending on your circuit, since it has a lower input offset figure, IIRC.
Hi!
Subwo1, Thanks for sugesting an alternative to the MAX9690, I looked around for awhile and came up with nothing I could simulate with so far. I'm not opposed to Ltspice, but I think I'm still just getting my feet wet with pspice. Anyway, I will put that plan on the back burner for a little while, still want to fix up basic UCD version. I know it can do better. Once I've beaten it or it's beaten me I just might rebuild with Ltspice for yet another comparison. I wonder if it will have the transistor selection I'm after though.
@Ivan, It seems you used additional filtering for your fourier tests, and it didn't really make much of a difference huh, that correlates well with my simulation as well. Very little, if no improvement with additional filtering in spice, I found it not worth the effort.
I also dont' capture data for the first few cycles. I run for 10 cycles of whatever frequency I want to test, and start capturing data for the FFT at 9 cycles.
I was wondering, and forgive me if I missed it, how many harmonics did you use to simulate with?
Normally I used less than 10, I just tried 100, and THD= 100%
-How does one decide this?
Something that's bothering me:
I virtually nullified the gross DC offset of -0.5 volts my circuit had.
When I say that I mean -0.01Vdc offset, so I now consider that to be no longer a problem, yet the results are far worse.
I'm now seeing ODD harmonics generated, up to 9Khz, at which point it flattens out and stays flat up to the switching frequency.
From what I just read, that makes sense, half bridges cancel even harmonics by treating both halves of the waves equally, and emphasises odd harmonics, but does this hold true for class D?
I'm not sure, because when I re-introduce the gross DC offset, I still see those odd harmonics. I dont' yet know where they came from, they weren't there before and I hadn't changed anything else. In class D what contributes to odd harmonic generation?
I intend on making some serious changes to the output and driver stages anyway, but I have no idea how or why they crept up on me, I couldn't even see the fundamental before, and had a nice flat line from 0 to Fs.
IVX, my results are worse, but once I know how many harmonics you used for your tests I'll try to duplicate them with my circuit for a comparison with pspice results, I think they'll be somewhat similar in effect. I'll get back to you all on this after a few pots of coffee and alot more work.
Regards,
Chris
Subwo1, Thanks for sugesting an alternative to the MAX9690, I looked around for awhile and came up with nothing I could simulate with so far. I'm not opposed to Ltspice, but I think I'm still just getting my feet wet with pspice. Anyway, I will put that plan on the back burner for a little while, still want to fix up basic UCD version. I know it can do better. Once I've beaten it or it's beaten me I just might rebuild with Ltspice for yet another comparison. I wonder if it will have the transistor selection I'm after though.
@Ivan, It seems you used additional filtering for your fourier tests, and it didn't really make much of a difference huh, that correlates well with my simulation as well. Very little, if no improvement with additional filtering in spice, I found it not worth the effort.
I also dont' capture data for the first few cycles. I run for 10 cycles of whatever frequency I want to test, and start capturing data for the FFT at 9 cycles.
I was wondering, and forgive me if I missed it, how many harmonics did you use to simulate with?
Normally I used less than 10, I just tried 100, and THD= 100%
-How does one decide this?
Something that's bothering me:
I virtually nullified the gross DC offset of -0.5 volts my circuit had.
When I say that I mean -0.01Vdc offset, so I now consider that to be no longer a problem, yet the results are far worse.
I'm now seeing ODD harmonics generated, up to 9Khz, at which point it flattens out and stays flat up to the switching frequency.
From what I just read, that makes sense, half bridges cancel even harmonics by treating both halves of the waves equally, and emphasises odd harmonics, but does this hold true for class D?
I'm not sure, because when I re-introduce the gross DC offset, I still see those odd harmonics. I dont' yet know where they came from, they weren't there before and I hadn't changed anything else. In class D what contributes to odd harmonic generation?
I intend on making some serious changes to the output and driver stages anyway, but I have no idea how or why they crept up on me, I couldn't even see the fundamental before, and had a nice flat line from 0 to Fs.
IVX, my results are worse, but once I know how many harmonics you used for your tests I'll try to duplicate them with my circuit for a comparison with pspice results, I think they'll be somewhat similar in effect. I'll get back to you all on this after a few pots of coffee and alot more work.
Regards,
Chris
I'd try to find an explanation, if you gave me a digestable format of simulation, but this way I don't see anything of your problem.
Never mind, I don't even have time.
Never mind, I don't even have time.
I've found the problem, working on a solution now.
Not asking for hand outs here, just trying to further my understanding.
As in, determine usefull tests for class d in spice, and understanding their limitations, in order to best optimise both them, and whatever circuit under them.
Sorry if I mislead with my rambling, my questions were,
1. How many harmonics to simulate THD with in spice/why?
2. What can induce odd harmonics in a class d type half bridge..
I very well may have one possible answer to that one by now, but can't say with any degree of certainty as I haven't yet solved the problem I found. I'll let you know when I do.
Thanks for your time,
Chris
Not asking for hand outs here, just trying to further my understanding.
As in, determine usefull tests for class d in spice, and understanding their limitations, in order to best optimise both them, and whatever circuit under them.
Sorry if I mislead with my rambling, my questions were,
1. How many harmonics to simulate THD with in spice/why?
2. What can induce odd harmonics in a class d type half bridge..
I very well may have one possible answer to that one by now, but can't say with any degree of certainty as I haven't yet solved the problem I found. I'll let you know when I do.
Thanks for your time,
Chris
I've designed one UcD amp (+/-100V, 38A power stage) with an AD790 instead of the discrete comparator. It is spectacular in that way that it oscillates correctly from +/-1V power supply upwards. The disadvantages are increased complexity getting it interfaced correctly to the driver (so the total number of parts is still the same) and about 10dB increased noise because of the comparator's large bandwidth.
I should redo that design with the discrete comparator but it's nearly finished now so I'll leave it as it is.
I should redo that design with the discrete comparator but it's nearly finished now so I'll leave it as it is.
1. You need a very small time step (1ns) in order to get the noise of the simulation down. That small time step will give you as many harmonics as you could ever want. Depending on the simulation tool it only makes sense to trust the first 5 or so.classd4sure said:
e.g. Microcap: completely useless for class D simulation
Pspice (=orcad): rather precise results are possible.
To be honest, I've never simulated a complete amp. I do simulate when developing subcircuits though.
2. Unequal switching behaviour going up/down is the most obvious one.
Hi,
Neat, I take it the built in hysteresis isn't enough to affect it? Certainly a nice option, I'd have alot more luck interfacing properly than doing a good job of making that comparator. No doubt I'll be giving that a shot, see how they match up. No plans to abandon the discrete version though. Much to learn.
Orcad is what I'm abusing.
That's interesting because I was plagued with a half volt output offset which gave me serious unequal switching up/down, and so far, produced the very best results. Once I figured out how to power the comparator properly (I hope), offset was minimized, and that's when the odd harmonics showed up.
I backtracked a bit and re-tested with the gross offset, seems I'm stuck with those odd harmonics, nothing else was changed.
How about gross cross conduction? I know what I have to make happen to fix that, get the turn off driver working faster...nice balancing act!
It's already been improved somewhat....still a long way to go, not sure if it's helped those harmonics much yet.
I'm endlessly impressed with pspice simulating this at all, considering I started with EWB, it's a nice tool. I can trust it enough so far that I blame myself instead of the program, keeps me working at it, though I expect I'll hit that wall with it eventually.
I'm learning alot at any rate.
Regards,
Chris
Neat, I take it the built in hysteresis isn't enough to affect it? Certainly a nice option, I'd have alot more luck interfacing properly than doing a good job of making that comparator. No doubt I'll be giving that a shot, see how they match up. No plans to abandon the discrete version though. Much to learn.
Orcad is what I'm abusing.
That's interesting because I was plagued with a half volt output offset which gave me serious unequal switching up/down, and so far, produced the very best results. Once I figured out how to power the comparator properly (I hope), offset was minimized, and that's when the odd harmonics showed up.
I backtracked a bit and re-tested with the gross offset, seems I'm stuck with those odd harmonics, nothing else was changed.
How about gross cross conduction? I know what I have to make happen to fix that, get the turn off driver working faster...nice balancing act!
It's already been improved somewhat....still a long way to go, not sure if it's helped those harmonics much yet.
I'm endlessly impressed with pspice simulating this at all, considering I started with EWB, it's a nice tool. I can trust it enough so far that I blame myself instead of the program, keeps me working at it, though I expect I'll hit that wall with it eventually.
I'm learning alot at any rate.
Regards,
Chris
WELL,WELL,WELL...
I did not sleep two nights, and came too late for my day job yesterday even... Below is result of my simulations:
MC7.16 1khz 0.004294%@20khz_band 0.006986%@60khz_band
MC7.16 10khz 0.000966%@20khz_band 0.003488%@30khz_band 0.004877%@60khz_band 0.005231%@200khz_band
Pspice9.2 1khz 0.00165%@20khz_band 0.00172%@60khz_band
Pspice9.2 10khz 0.00045%@20khz_band 0.004942%@30khz_band 0.00685%@60khz_band 0.00699%@200khz_band
comments will be soon.😱
I did not sleep two nights, and came too late for my day job yesterday even... Below is result of my simulations:
MC7.16 1khz 0.004294%@20khz_band 0.006986%@60khz_band
MC7.16 10khz 0.000966%@20khz_band 0.003488%@30khz_band 0.004877%@60khz_band 0.005231%@200khz_band
Pspice9.2 1khz 0.00165%@20khz_band 0.00172%@60khz_band
Pspice9.2 10khz 0.00045%@20khz_band 0.004942%@30khz_band 0.00685%@60khz_band 0.00699%@200khz_band
comments will be soon.😱
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