I was hasty there, should have said the mean squared noise current from a full shot noise process with a mean current of Io is In^2 = 2*qe*Io*delta f.
An example for a typical base current of 1uA: in a 10kHz bandwidth, 56.6pA rms.
Yes, Waveb -- now I think it was called popcorn noise... was it a processing issue or poor design/tradeoffs? Thx.
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what would be an example of an uncorellated event's source/cause? Odd dopes? Impurities? Thx
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Yes, it was technological issue. That's why "Dirty currents" and "Dirty noises" terms.
Attachments
So, sorry to intrude - but is anyone going to sim that circuit and help to verify the results? Or was that entire point of disagreement meaningless? I was trying to follow that part of the discussion and understand exactly what the unspoken issue between the fast run sim and the much longer run sim might be? Does it lie with parameters not included or taken into account, making the simulation less comprehensive?
Also, what exactly are the thermal considerations for a discrete implementation as compared with those of a single IC design on a single substrate?
_-_-bear
PS. I am somewhat surprised that the circuit in question showed such a good result in terms of low distortion and almost nil higher order harmonics... is this real as in realizable in a practical implementation where things are less than ideal?
Also, what exactly are the thermal considerations for a discrete implementation as compared with those of a single IC design on a single substrate?
_-_-bear
PS. I am somewhat surprised that the circuit in question showed such a good result in terms of low distortion and almost nil higher order harmonics... is this real as in realizable in a practical implementation where things are less than ideal?
I don't think we are disputing the results so much as questioning the purported requirement of sim time.
As to independent sims. kinda busy right now. I could tell you but I'd have to... well you know.
Scott is working on the sim for the output stage that I used in my example for his front end. he will tell us what he thinks after his sim's.
Many circuits have this characteristic... commonly found with jFETs. And, that is one of the reasons jFETs are popular for the audio amps.... and one of the tenants of Johns designs. Namely, lack of higher order harmonics when designed properly.
Many circuits have this characteristic... commonly found with jFETs. And, that is one of the reasons jFETs are popular for the audio amps.... and one of the tenants of Johns designs. Namely, lack of higher order harmonics when designed properly.
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Brad
Something like this?
I have replaced the BF’s and am using 2SK170 instead. The BF862 model I have seems to be a bit “funky”, doesn’t behave as it should.
BTW: I’m sure it’s possible to optimize the circuit further for those interested.
BTW 2: I don’t think Scott, Brad and I disagree about design issues.
For those interested I’m using a custom built PC that runs silent using SSD for programs and 1TB HD for storage, Intel i7 960 CPU 3.2GHz, 12GB RAM, Win7 professional. Simulation program used here: Spectrum Software Micro-cap 10.
Cheers
Stein
Something like this?
I have replaced the BF’s and am using 2SK170 instead. The BF862 model I have seems to be a bit “funky”, doesn’t behave as it should.
BTW: I’m sure it’s possible to optimize the circuit further for those interested.
BTW 2: I don’t think Scott, Brad and I disagree about design issues.
For those interested I’m using a custom built PC that runs silent using SSD for programs and 1TB HD for storage, Intel i7 960 CPU 3.2GHz, 12GB RAM, Win7 professional. Simulation program used here: Spectrum Software Micro-cap 10.
Cheers
Stein
S/N and THD seems low by 10db or so from what it could do in real life.
But, I'm sticking to the BF types. You have similar cpu system and same sim software... easy to compare notes, then. SSD is great!! -RNM
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I find this design (of Scott's) somewhat confusing. It first appears as a truly symmetrical circuit, but in reality, because only N jfets are used, it looks like a just too 'busy' single differential circuit. What am I missing here?
RNMarsh,
SSD is great except for the price and still to small volume. But unless you are doing real-time backup what happens if one of those drives fails? I don't think that you can retrieve the information on a dead SSD drive unlike a disk, at least not yet that I know of. I keep looking at them for speed, especially rendering drawings in CAD, but they are still just too small in size and I still see that the reliability isn't any better than a spinning disk yet.
SSD is great except for the price and still to small volume. But unless you are doing real-time backup what happens if one of those drives fails? I don't think that you can retrieve the information on a dead SSD drive unlike a disk, at least not yet that I know of. I keep looking at them for speed, especially rendering drawings in CAD, but they are still just too small in size and I still see that the reliability isn't any better than a spinning disk yet.
The constraint was suggested to not use the hard to get PFET's. Complimentary FET's drop right in to make it symmetrical.
Dick, I'm having trouble with your output stage, it wants to commutate suddenly from PNP to NPN in the output pairs at +-2V out? With the 4.7 Ohms in both places and 30 Ohm load this makes some sense if you just walk through it .
Commutate
Hmmm. N to P in upper pair OR lower pair or do you mean N to P between upper and lower pairs?
Things to look at --- maybe your sim input is too fast rise time? It doesnt happen in real life. Amp also might be clipping. Is output is too high? The amp doent have large output swing because too much local degen. But 2v p-p should be low enough... 2 v rms maybe not.
Or are you only modelling the output stage without other circuitry (which would affectively band limit the signal to the output stage?)
What do you mean 4.7 in Both places... as originally drawn or something new... ? Which places?
Band limit input signal and see what happens etc.
.... I'll be back home later to night. -Dick
Hmmm. N to P in upper pair OR lower pair or do you mean N to P between upper and lower pairs?
Things to look at --- maybe your sim input is too fast rise time? It doesnt happen in real life. Amp also might be clipping. Is output is too high? The amp doent have large output swing because too much local degen. But 2v p-p should be low enough... 2 v rms maybe not.
Or are you only modelling the output stage without other circuitry (which would affectively band limit the signal to the output stage?)
What do you mean 4.7 in Both places... as originally drawn or something new... ? Which places?
Band limit input signal and see what happens etc.
.... I'll be back home later to night. -Dick
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The SSD would be longer lived than mechanical HDD. But I would burn in the SSD memory for at least 100 hours before putting it into actual use where failure could be a disaster... get any early failures taken care of. They are impressively fast when dealing with multiple large file shuffling !! phew! They are fast... could get spoiled by them. using HDD for backup.
Thanks for that advice RNMarsh. I do Solidworks design and the rendering can be rather slow and that is being nice. A faster hard drive would be nice but so would more cores help. Soon it will be time to upgrade but things just keep getting faster and faster all the time. I know what I want, just can't afford it right at the moment. Just a great GPU can cost a bunch for what I am doing. Now if there were more than a couple of great screens for windows machines that could equal Apples screens that would be nice. The HP 30" is just to much damned money, worse than buying Apple, except my software won't run on Apple. Don't anyone tell me about virtual windows on Apple, way to slow to run in that way. not going to happen.
Steven
Steven