DIR1703 multiple unlock frequencies

[Reaper]

Hi, I know there is a few DIR1703 threads out there - but I wonder if any body has this issue. I had a problem with the DIR1703 unlock pin staying high, no matter what mode (crystal or pll) the chip was in, or what option was selected. So to test this I fed a square wave to the chip. I then varied the frequency to see at what frequencies I might get low on the unlock pin.
The results:
600KHz
1MHz
2.6MHz
2.7MHz
3.9MHz
4MHz
Checking this website http://www.epanorama.net/documents/audio/spdif.html it says "Signal bitrate is 2.8Mhz (Fs=44.1kHz), 2Mhz (Fs=32kHz) and 3.1Mhz (Fs=48kHz)". Now to check out what frequency was coming out of my soundcard (Soundblaster live digital Entertainment 5.1). To get the true frequency of a S/PDIF signal I worked out the frequency over a number of periods. The result 2.2MHz. I am still not getting any data out. Have I got a correct S/PDIF signal?

The first picture shows what the S/PDIF looks like with 75 ohm termination. The second picture shows the signal after the inverters before the chip. I have bypassed the crystal, sending a signal from a waveform generator instead(for testing purposes). Although the circuit shows 74hc04 chip, I could not get this working. So now I am using GD4069UB. It gives a clean signal (as shown). I have not used the 74HCU04 as stated in other threads because the freight is way to high (only cents for a chip but about US$20 for freight). I may have to bite the bullet and buy it. Has anyone got the circuit working with a chip that is not the 74HCU04?

Also anyone annoyed that the DIR1703 is now discontinued? I have checked the TI site and can not find a replacement. They have discontinued this product due to problem locking on to the signal after the sampling rate changes. Could this be related to my problem? I would be interested to hear from people that have had this chip working, to see what sorts of problems they had.

Thanks.

 

[Prune]

Huh? S/PDIF is a standard specified at a bit over 12 MHz. I fed a 96 KHz rate audio into a 44.1 KHz DAC and it works fine, just ignores what it can't deal with.

 

[Reaper]

The image did not show - ill try again.

 

[Reaper]

After inverters

 

[Reaper]

schematic - may be rotated 90 degrees - this forum has weird image rules.

 

[rfbrw]

Your results are invalid for two reasons.
SPDIF is biphase-mark encoded and the code-violations that create the preambles that define the start of channels A and B and the Channel status block are missing.
I suggest you get a copy of either IEC60958 or AES3. These douments define the SPDIF/AES_EBU standard.

 

[Wodgy]

Your results are invalid for two reasons.
SPDIF is biphase-mark encoded and the code-violations that create the preambles that define the start of channels A and B and the Channel status block are missing.
I suggest you get a copy of either IEC60958 or AES3. These douments define the SPDIF/AES_EBU standard.

I agree that what he's doing is unusual, but I assume that with a square wave input he should be able to get LOCK asserted but with NOTAUDIO also asserted.

 

[rfbrw]

If the DIR1703 is to determine the status of the data, it has to read the channel status bits. It cannot do that if there is no preamble to tell it when the channel status block starts.