differential clock

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Strange. I had it open just then.
OK I take the risk. Here is the circuit I was talking about.

Patrick
 

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The basic colpitts has the crystal grounded.

In that schematic C2 and C3 are very large, perhaps because bias Rs are small, so C1_aIIb is in series with C2 and C3 to reduce the crystal load capacitance and adjust the frequency.
Too large C would heat up the crystal and shorten it's lifetime.

In my differential schematic the caps are also relative large but left side 100 p + 120 p are in series with right side 100 p + 120 p, so the summ is 27 p, that should be ok.
 
Ups...
As far as I know, 33 MHz already calls for a series resonance / overtone circuit, I am not sure if a 22 MHz crystal still works optimal here.
Perhaps google...

I once put a 33 MHz crystal into a player that had 11 MHz originally and it worked just normal.
 
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I checked the Colpitts design using the equations from Neubig, and came to around 330p for the two caps near the JFET. This requires an additional series cap of 30p to drop the equivalent capacitance to the CL of the Xtal. I also checked quite a few Colpitts common collector circuits using BJTs, as used by CB fans, and almost all of them have highish capacitors (150p-390p).

I need time to understand all these first. While I believe the circuits posted by you and the likes of Elso work, and work well, no one seems to be able to tell me how the values are arrived at, based at least on some simplified analysis. It cannot be all black magic.

But this is perhaps my self-made problem. 😉


Patrick
 
But this is perhaps my self-made problem. 😉

A larger total C gives smaller output amplitude.
The two Cs form an AC voltage divider and determine the feedback.
Larger lower cap = smaller output amplitude = more stable oszillation.

We want amplitude large enough to have a clean switching comparator but small enough to avoid distortion / clipping of the FET stage. And a total C of about 30 pF.

I think the values in my schematic are a good compromise, evaluated with my spectrum analyzer.

You could double or triple the values of the Cs and add series Cs but what should that bring ?


Another idea: Inductances in series with the resistors that go from the crystal to ground ???????
 
If you want 2-3 offs, Elektor has a prototype service :
www.elektorpcbservice.de

Quite expensive, but you get pretty much everything, including 4 layer boards.
For quantities, We have used MultiPCB with satisfaction.

Thanks, I will perhaps make printed boards one day, now my priority is to make a double-deck case for the 13 boards*** of the DAC and another for the 4 transformers and 4 boards of the PSU.



*** 1 x receiver, 1 x reclocker, 1 x clock, 4 x DAC, 2 x capacitor banks, 4 x analog filter, all between 80 x 100 and 100 x 220
 
I totally overlooked that the ADCMP567 has a variable Vdd and at least a receiver may be AC coupled, so I could go:

LVPECL: ADCMP567 ( 250 ps / 5 GHz ) LVEL51 ( 475 ps / 2,8 GHz ) LVEL11 ( 330 ps / 1 GHz )

Total 1,055 ns

Or:

NECL/LED: ADCMP567 ( 250 ps / 5 GHz ) EL16 AC input ( 250 ps / 1,75 GHz ) EL52 ( 365 ps / 2,8 GHz ) EL11 ( 265 ps / 1,5 GHz ) LED ( ? / ? )

Total 1,13 ns + LED ?

Or eventually:

NECL/LED: ADCMP567 ( 250 ps / 5 GHz ) EL52 AC input ( 365 ps / 2,8 GHz ) EL11 ( 265 ps / 1,5 GHz ) LED ( ? / ? )

Total 0,88 ns + LED ?

Or use the ADCLK925 instead of the EL11 and reduce further by 170 ps.
 
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> Larger lower cap = smaller output amplitude = more stable oszillation.

No, I meant ratio of the 2 Cs the same but double or triple the value.

> You could double or triple the values of the Cs and add series Cs but what should that bring ?

Precisely what I wanted to understand and why they are all doing it in CBs (Funkamateur).

> *** 1 x receiver, 1 x reclocker, 1 x clock, 4 x DAC, 2 x capacitor banks, 4 x analog filter, all between 80 x 100 and 100 x 220

Show me a photo. Maybe I can help you with some ideas. Am mechanical by profession.


Patrick
 
ADCLK925 only works for 3.3V.
I shall stick to EL89 and red LED CRD biased at 2mA or so to -5V or even -9V.

In your Colpitts circuit, you bias the JFET to -5.2V with 1k.
What bias current do you have and at what voltage is the JFET source at ?

ADCLK925: 2,5 V to 3,3 V and I need 3 V.

Initially when I had the idea to make it differential, I wanted to have the output @ or close to 0 V to allow DC coupling and to have symmetrical voltage swing.

So the supply voltages are + / - 2,5 V & ground instead of +5 V & ground.
The average current brings the supply down after the RC filters.

Measured: Supply +/- 2,3 V, junction of 1k and FET + 1,1 V.

You can reduce the 1,1 V by reducing the 1 k.
Perhaps also by biasing the 10meg resistors to another voltage than ground.

I stopped playing with the oszillator when the ECL thing started...
 
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