Hi studiostevus, I'll pm you the layout, it's for my private use- wrong or rightly done 🙂 and if Thorsten ok's it & looks like the star ground approach already deemed unfit by marce he he..
Hi,
This is of course true, however, again this is not relevant in my case. The return currents that matter will not be able to couple into the analog groundplanes. They are I2S attenuated to a few 100mV to correctly interface the current steering logic inside the TDA1541 which normal logic levels overdrive. These signals are also slewrate limited to avoid too much leakage into the TDA1541 substrate.
The return current from the attenuator/slewrate limiter circuits needs a plane to return and that happens to be the digital ground plane. The current into the TDA1541 Bipolar inputs is completely minimal in this case.
Note, I do not normally advocate this kind of layout, I do advocate it ONLY for the TDA1541 because it has a number of requirements to optimise the performance that are difficult to satisfy otherwise and because in THIS PARTICULAR CASE it is the best solution.
The analogue plane is actually quite vestigial, it covers only a little outside of the outline of the IC's, except on the side where the shunt regulators are (remember the supply for the TDA1541 is fully floating, not connected anywhere with the rest).
However a plane is the easiest way to create a low impedance for all the 27 pcs decoupling capacitors (PSU and DEM) on the analogue side and to allow low impedance linking between digital and analogue sections as well. I did the "spiderleg starground" as well, the plane is better in terms of voltages dropped. There is nothing on the digital plane above the
Basically there is ton's of non-standard stuff going on in this and my approach offers the best compromise to get the desired results in this case. In other cases a completely different approach may give the best compromise and then I will use that approach.
The fact that you are just blasting about without ascertaining the facts or even trying to understand what goes on tells me that you have a lot to learn, but I am not giving lessons.
Best go straight to the full transistor level circuit for the TDA1541 and work from that. The Datasheets are correct but do not tell you 90% of what you need to know.
BTW, my design has a stable and equipotential reference point, it literally is the analogue ground, which is created locally only and linked low impedance to the digital ground.
I would say the excessive use of single plane designs has more to do with a lack of understanding analogue circuits and intellectual laziness. Is often the easiest solution to give acceptable performance, but not necessarily always the best solution.
However, given the average modern designers skillset it is probably better to simply promote single planes, there is only so much that can go wrong that way. Giving them choices is bound to make the more often take the wrong one than the right one.
Some of us still remember making valve based Radio receivers and complex analogue circuits and working with early mixed signal systems and hence can do things different when needed. 😀
Probably not, I need someone who is better than me, otherwise I'm better of doing it myself. And if I have a job that can be done using the "usual" techniques, so to speak "by the book", chinese or indian contractors are probably cheaper than you and read the same books... 🙂
Ciao T
This is of course true, however, again this is not relevant in my case. The return currents that matter will not be able to couple into the analog groundplanes. They are I2S attenuated to a few 100mV to correctly interface the current steering logic inside the TDA1541 which normal logic levels overdrive. These signals are also slewrate limited to avoid too much leakage into the TDA1541 substrate.
The return current from the attenuator/slewrate limiter circuits needs a plane to return and that happens to be the digital ground plane. The current into the TDA1541 Bipolar inputs is completely minimal in this case.
Note, I do not normally advocate this kind of layout, I do advocate it ONLY for the TDA1541 because it has a number of requirements to optimise the performance that are difficult to satisfy otherwise and because in THIS PARTICULAR CASE it is the best solution.
The analogue plane is actually quite vestigial, it covers only a little outside of the outline of the IC's, except on the side where the shunt regulators are (remember the supply for the TDA1541 is fully floating, not connected anywhere with the rest).
However a plane is the easiest way to create a low impedance for all the 27 pcs decoupling capacitors (PSU and DEM) on the analogue side and to allow low impedance linking between digital and analogue sections as well. I did the "spiderleg starground" as well, the plane is better in terms of voltages dropped. There is nothing on the digital plane above the
Basically there is ton's of non-standard stuff going on in this and my approach offers the best compromise to get the desired results in this case. In other cases a completely different approach may give the best compromise and then I will use that approach.
The fact that you are just blasting about without ascertaining the facts or even trying to understand what goes on tells me that you have a lot to learn, but I am not giving lessons.
Best go straight to the full transistor level circuit for the TDA1541 and work from that. The Datasheets are correct but do not tell you 90% of what you need to know.
BTW, my design has a stable and equipotential reference point, it literally is the analogue ground, which is created locally only and linked low impedance to the digital ground.
I would say the excessive use of single plane designs has more to do with a lack of understanding analogue circuits and intellectual laziness. Is often the easiest solution to give acceptable performance, but not necessarily always the best solution.
However, given the average modern designers skillset it is probably better to simply promote single planes, there is only so much that can go wrong that way. Giving them choices is bound to make the more often take the wrong one than the right one.
Some of us still remember making valve based Radio receivers and complex analogue circuits and working with early mixed signal systems and hence can do things different when needed. 😀
Probably not, I need someone who is better than me, otherwise I'm better of doing it myself. And if I have a job that can be done using the "usual" techniques, so to speak "by the book", chinese or indian contractors are probably cheaper than you and read the same books... 🙂
Ciao T
Hi,
There is a massive meta thread here about non-oversampling TDA1541 in thishere board.
Funny, that company once asked us to be allowed to use a photo of one our circuit board to advertise their products, the one on the right:
Around the Lattice CPLD. We use their epcial decoupling cap's, FWIW, not just there...
Ciao T
There is a massive meta thread here about non-oversampling TDA1541 in thishere board.
Funny, that company once asked us to be allowed to use a photo of one our circuit board to advertise their products, the one on the right:
Around the Lattice CPLD. We use their epcial decoupling cap's, FWIW, not just there...
Ciao T
Interesting comments on the TDA, it does seem quite a novel beast, one that I do find interesting, so I hope you will accepty my appologie for jumping in to fast in this instance.
(ide2003, I still stand by my comments in general terms).
Ha, interseting comment about offshore design, quite afew hang out on a PCB/electronics forum, and they dont always read the books, they do a software training course and go for it. Luckily I do have a lifetimes worth of practice and experience (started with red and blue tape ups) and of course my designs get critiqued to the extreme, EMC tested to the extreme, in fact every bit is tested to the extreme, we also use a lot of signal integrity these days. So I dont just read then books and get sent on training courses, I have quite a few hundred designs under my belt, all commercial, aerospace or mil designs.
I think the move from seperate planes it due to various factors, some being:
shrinking packages, a lot of designs now have more than one ADC or DAC, makes choosing a star point harder, some have several devices, the ever increasing density of designs makes keeping them seperate almost imposible.
Reduced operating voltages, we used to have seperate grounds, but with the reduced voltages, EMC testing can cause one ground to lift causing problems, this was one of the factors that influenced our desision.
Ever increasing rise times and numerous SMPS's for core voltages dosn't help either.
I dont think the use of one ground makes layout easier, it makes it harder, as you have to seperate the analoge and digital components and signals to keep things as clean as possible, no crossing areas etc. Is it better design practice having one plane, yes and no, for dense designs where splitting them would cause multiple star points yes, for ultimate fidelity no, in fact I prefer seperate analogue and digital boards prefferably isolated. Hard to do with an ADC or DAC design obviously. All boards I do lay out with analoge and digital sections start out with seperate grounds, as an aid during placement and routing you can keep the two areas and signals seperate, but for EMC reasons stiched together before ODB++ or Gerber data is generated.
Again ide2003, before you comment on what I said quote me correctly, I said spiders leg star grounds, there isb a difference between them and a ground that is done in such (star point, galvonic isolation etc) a way to avoid high current returns swamping low signal areas, this is standard practice where you have high power and low power sections, power amplifiers for both audio and drives use this practice, as do high power SMPS's. The spiders leg grounds will work after a fashion for low frequency designs, but unfortenatley you have to cater for RF interference these days and the extreme spders leg designs are not that good for RF supression. Also while you are smirking, Im afraid to tell you that for modern day digital designs, with even the lowliest chips having crazy rise times these days, your traditional star ground isn't gonna work for digital designs. So if your brave enought send me your design as well
(ide2003, I still stand by my comments in general terms).
Ha, interseting comment about offshore design, quite afew hang out on a PCB/electronics forum, and they dont always read the books, they do a software training course and go for it. Luckily I do have a lifetimes worth of practice and experience (started with red and blue tape ups) and of course my designs get critiqued to the extreme, EMC tested to the extreme, in fact every bit is tested to the extreme, we also use a lot of signal integrity these days. So I dont just read then books and get sent on training courses, I have quite a few hundred designs under my belt, all commercial, aerospace or mil designs.
I think the move from seperate planes it due to various factors, some being:
shrinking packages, a lot of designs now have more than one ADC or DAC, makes choosing a star point harder, some have several devices, the ever increasing density of designs makes keeping them seperate almost imposible.
Reduced operating voltages, we used to have seperate grounds, but with the reduced voltages, EMC testing can cause one ground to lift causing problems, this was one of the factors that influenced our desision.
Ever increasing rise times and numerous SMPS's for core voltages dosn't help either.
I dont think the use of one ground makes layout easier, it makes it harder, as you have to seperate the analoge and digital components and signals to keep things as clean as possible, no crossing areas etc. Is it better design practice having one plane, yes and no, for dense designs where splitting them would cause multiple star points yes, for ultimate fidelity no, in fact I prefer seperate analogue and digital boards prefferably isolated. Hard to do with an ADC or DAC design obviously. All boards I do lay out with analoge and digital sections start out with seperate grounds, as an aid during placement and routing you can keep the two areas and signals seperate, but for EMC reasons stiched together before ODB++ or Gerber data is generated.
Again ide2003, before you comment on what I said quote me correctly, I said spiders leg star grounds, there isb a difference between them and a ground that is done in such (star point, galvonic isolation etc) a way to avoid high current returns swamping low signal areas, this is standard practice where you have high power and low power sections, power amplifiers for both audio and drives use this practice, as do high power SMPS's. The spiders leg grounds will work after a fashion for low frequency designs, but unfortenatley you have to cater for RF interference these days and the extreme spders leg designs are not that good for RF supression. Also while you are smirking, Im afraid to tell you that for modern day digital designs, with even the lowliest chips having crazy rise times these days, your traditional star ground isn't gonna work for digital designs. So if your brave enought send me your design as well
ah..I consider your offer as compliment, thank you marce, as I still have this one not under my belt, this is as far as I can remembered only the 3rd digital pcb I've made, and the first diy audio one, you'll see if you see the traces 🙂, the other were some driver boards for my (diy) cnc machine. Please enlighten me on this.
It works allright as Thorsten kindly have said it will but the quality will not be that high, thank you T for your time. I have made the working hardwired one btw. In one occasion I can hear the TDA 'sings' (buzzed to be exact) through my speakers and through my ears if I put mine close enough to the chip. The buzz was gone after I relocated the Salas shunt reg grounds to the star ground. So I'll be brave, anything to get it sound even better I will 🙂, you got PM , thanks
It works allright as Thorsten kindly have said it will but the quality will not be that high, thank you T for your time. I have made the working hardwired one btw. In one occasion I can hear the TDA 'sings' (buzzed to be exact) through my speakers and through my ears if I put mine close enough to the chip. The buzz was gone after I relocated the Salas shunt reg grounds to the star ground. So I'll be brave, anything to get it sound even better I will 🙂, you got PM , thanks
Hi,
No worries, and sorry for tearing you off a strip in return...
I'm just kind of getting tired of too many people just quoting the textbooks and not thinking (not just PCB layout, be it Cables or Amplifier designs...).
True. One does need to ask for samples of the work before giving someone a job...
This I completely agree on. With Modern CMOS stuff ground planes are a must.
The fun part is that the TDA1541 is essentially build using a similar style (but not the exact designs) found with ECL Chips.
So, unless we overdrive stages the current dumped into the supplies and grounds is no more than the nonlinearity of the differential circuits, that is magnitudes lower and slower than the switching spikes that CMOS logic generates.
However the DEM shooting match, due to the switching nature can dump quite some error current into the filter capacitors and thus the grounds (yet the net of all the currents is always zero) that low impedance is paramount.
Equally, the current from the outputs of the TDA1541 strictly speaking are not directly referenced to ground, but to two of the supplies. One sources current to drive the output, the other sinks the difference, so full return for the analogue output current is from the local ground to two supply pins.
All in all the TDA1541 is a marvelous example of what could be done with 1980's technology and of all the things that we did not understand as well back then as we do now.
What makes the problems worse is that in modern designs we invariably have to pair this Dinosaur with modern High Speed Cmos circuitry, which has it's own demands on supplies and grounding. For one, this need should impress the benefit from having completely separate supplies for the TDA1541 and any other logic, as this allows a better way to separate the noisy Cmos Grounds and those of the TDA1541...
And if we MUST use a single ground plane, make sure that the TDA1541 with it's supply sits at one end of the board, while the Cmos stuff sits on the other side and has it's supplies at that edge of the PCB so that the signals to the DAC cross the middle of the board. This should minimise any contamination and is usually doable.
Ciao T
Interesting comments on the TDA, it does seem quite a novel beast, one that I do find interesting, so I hope you will accepty my appologie for jumping in to fast in this instance.
No worries, and sorry for tearing you off a strip in return...
I'm just kind of getting tired of too many people just quoting the textbooks and not thinking (not just PCB layout, be it Cables or Amplifier designs...).
True. One does need to ask for samples of the work before giving someone a job...
Also while you are smirking, Im afraid to tell you that for modern day digital designs, with even the lowliest chips having crazy rise times these days, your traditional star ground isn't gonna work for digital designs. So if your brave enought send me your design as well
This I completely agree on. With Modern CMOS stuff ground planes are a must.
The fun part is that the TDA1541 is essentially build using a similar style (but not the exact designs) found with ECL Chips.
So, unless we overdrive stages the current dumped into the supplies and grounds is no more than the nonlinearity of the differential circuits, that is magnitudes lower and slower than the switching spikes that CMOS logic generates.
However the DEM shooting match, due to the switching nature can dump quite some error current into the filter capacitors and thus the grounds (yet the net of all the currents is always zero) that low impedance is paramount.
Equally, the current from the outputs of the TDA1541 strictly speaking are not directly referenced to ground, but to two of the supplies. One sources current to drive the output, the other sinks the difference, so full return for the analogue output current is from the local ground to two supply pins.
All in all the TDA1541 is a marvelous example of what could be done with 1980's technology and of all the things that we did not understand as well back then as we do now.
What makes the problems worse is that in modern designs we invariably have to pair this Dinosaur with modern High Speed Cmos circuitry, which has it's own demands on supplies and grounding. For one, this need should impress the benefit from having completely separate supplies for the TDA1541 and any other logic, as this allows a better way to separate the noisy Cmos Grounds and those of the TDA1541...
And if we MUST use a single ground plane, make sure that the TDA1541 with it's supply sits at one end of the board, while the Cmos stuff sits on the other side and has it's supplies at that edge of the PCB so that the signals to the DAC cross the middle of the board. This should minimise any contamination and is usually doable.
Ciao T
Hi,
Seriously consider incorporating the three Salas Shunts needed for the TDA1541 directly onto the PCB, close to the TDA1541. Turn the TDA1541 so the supplies are on one side of it, the side opposite to the digital signal entry.
Equally, whatever powers the CS8412 I would suggest put them directly onto the PCB, using at least optimised LM1085 is a good idea, use a seperate one for the analogue pin on the CS8412, this is the PLL Chargepump.
It has a nice spikey current and likes low impedance sources with low noise. As the LM1085 will have varying output impedance with current. So use big size, low value resistors in the voltage setting network to force extra current through the IC. As we are doing DIY here we have no need to be too fretful, stick big heatsinks on the regulators and run a few 100mA, even if the supplies circuit only draws a few dozend...
Here an earlier version of the TDA1541 DAC and related logic, this had the groundplane at the bottom, routing on top. It was reasonably good, but far from ideal.
Looking to the right side shows all the shunt regulators for both TDA1541 and the other associated circuitry. The IDC socket there carries the various grounds and ccs reguated supply lines to the circuit board.
You can also see the various decoupling Cap's and the DEM decoupling Cap's (SMD). Above and besides the top lefthand corner of the TDA1541 are the I2S attenuators and reclockers.
The "generic" logic is to the left hand side of that, covering a range of function. To the far left left of it are the discrete supplies for the clocks, and the IDC socket that carries the various supplies into the PCB. The clocks are on the left top with the clock distribution towards the top center of the board (remember, this board is both CD-Player and USB DAC).
I hope this gives some ideas of the general layout principles. The most recent version is a considerable refinement on the original concept seen above.
Ciao T
Seriously consider incorporating the three Salas Shunts needed for the TDA1541 directly onto the PCB, close to the TDA1541. Turn the TDA1541 so the supplies are on one side of it, the side opposite to the digital signal entry.
Equally, whatever powers the CS8412 I would suggest put them directly onto the PCB, using at least optimised LM1085 is a good idea, use a seperate one for the analogue pin on the CS8412, this is the PLL Chargepump.
It has a nice spikey current and likes low impedance sources with low noise. As the LM1085 will have varying output impedance with current. So use big size, low value resistors in the voltage setting network to force extra current through the IC. As we are doing DIY here we have no need to be too fretful, stick big heatsinks on the regulators and run a few 100mA, even if the supplies circuit only draws a few dozend...
Here an earlier version of the TDA1541 DAC and related logic, this had the groundplane at the bottom, routing on top. It was reasonably good, but far from ideal.
Looking to the right side shows all the shunt regulators for both TDA1541 and the other associated circuitry. The IDC socket there carries the various grounds and ccs reguated supply lines to the circuit board.
You can also see the various decoupling Cap's and the DEM decoupling Cap's (SMD). Above and besides the top lefthand corner of the TDA1541 are the I2S attenuators and reclockers.
The "generic" logic is to the left hand side of that, covering a range of function. To the far left left of it are the discrete supplies for the clocks, and the IDC socket that carries the various supplies into the PCB. The clocks are on the left top with the clock distribution towards the top center of the board (remember, this board is both CD-Player and USB DAC).
I hope this gives some ideas of the general layout principles. The most recent version is a considerable refinement on the original concept seen above.
Ciao T
Thanks for all the info Thorsten.
ECL is a blast from the past, sometimes we forget our roots and how much electronics aqnd PCB design has changed since I was a less cynical (and probably less grumpy) fresh faced student straight out of college. I have learnt a lot since then, but not enough wisdom🙂
ECL is a blast from the past, sometimes we forget our roots and how much electronics aqnd PCB design has changed since I was a less cynical (and probably less grumpy) fresh faced student straight out of college. I have learnt a lot since then, but not enough wisdom🙂
Thank you again mr. T, sure lot of good stuff here to digest..finally 🙂, just bought 20x20cm pcb, last weekend, will be fun to put 4 Salas regs in there..
So we are essentially looking at 2 gnd planes, which connect at pin 5 of the tda. In my test rig, i am using off-board regulators, input stage, and analog stage.
I assume the analog stage will be referenced to agnd, the input stage to dgnd and the supply lines to whatever they power (digital or analog gnd). This, in turn, makes pin 5 of the tda a star ground, doesnt it?
In my final setup i will integrate regulation and possibly output stage on the same board, but the same situation persists...
I assume the analog stage will be referenced to agnd, the input stage to dgnd and the supply lines to whatever they power (digital or analog gnd). This, in turn, makes pin 5 of the tda a star ground, doesnt it?
In my final setup i will integrate regulation and possibly output stage on the same board, but the same situation persists...
Hi,
Yes, essentially.
Not a good idea. In fact a terrible idea...
Yes.
Not really that easy, sorry I cannot tell more but the design I did form AMR is not for public release...
I guess that is a fair way of saying it.
Ciao T
Yes, essentially.
Not a good idea. In fact a terrible idea...
Yes.
Not really that easy, sorry I cannot tell more but the design I did form AMR is not for public release...
I guess that is a fair way of saying it.
Ciao T
I probably oversee something, but i fail to see the problem.
Tda needs 3 supplies, one of which is for analog (+5v) and the others are for digital, if i recall correctly. So i need 3 regs, the one for analog ties to agnd plane, the 2 for digital to dgnd.
Again; if you say there is a problem, i believe that. However can you point out what it is?
Thanks
Just been looking at the Lampizator site for this device, and the numerous different layouts, there are lots of different versions from cheep CEM single sided PCBs upwards.
Also reading through as much info as possible.
My initial thoughts are the chip pin out is as previously pointed out not optimum for the best layout.
I also need to go through the other threads on this device.
One of the main concerns I do come across is ground bounce and supplies. Mainly ground bounce, even small ground bounce (level changing) seems to have severe affects on the conversion.
The one thing I believe is that like a lot of older technology (30ns second rise times!!!)
it will work adequetly with a wide variety of layout techniques, the PROBLEM is coming up with a layout that is tailored to the device to get the optimum performance out of the chip.
Most devices are a damm sight easier to assess, and wrongly I first presumed this was similar, instead it is a rather more complex beast.
Also reading through as much info as possible.
My initial thoughts are the chip pin out is as previously pointed out not optimum for the best layout.
I also need to go through the other threads on this device.
One of the main concerns I do come across is ground bounce and supplies. Mainly ground bounce, even small ground bounce (level changing) seems to have severe affects on the conversion.
The one thing I believe is that like a lot of older technology (30ns second rise times!!!)
it will work adequetly with a wide variety of layout techniques, the PROBLEM is coming up with a layout that is tailored to the device to get the optimum performance out of the chip.
Most devices are a damm sight easier to assess, and wrongly I first presumed this was similar, instead it is a rather more complex beast.
now I envied the pro and semi pro who has proper instruments ...as most of us are completely blind, just finding the right connections are guess work...but it's fun with many hints from the pro 🙂
I think I may have found the problem...
http://www.diyaudio.com/forums/digital-line-level/31780-tda1541-info-11.html#post376367
http://www.diyaudio.com/forums/digital-line-level/31780-tda1541-info-11.html#post376367
So, that makes things clearer😱
For such a basic DAC the supplies are rather complex.
For such a basic DAC the supplies are rather complex.
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Hi,
This "basic DAC" was at the time (over 25 Years ago) Philips best and in terms of ENOB etc. it is very close to the limits for a 16 Bit Device, especially considering it offered this by design, without the need for laser trimming resistors etc. as found with AD and BB Audio DAC's.
In it's time was probably THE High End DAC, in terms of subjective performance it also still quite competitive in this day and age...
It also is worth noting that in terms of raw, direct resolution (not noise shaped) only the PCM1704 exceeds the TDA1541 among audio DAC's in current production, while the ESS Sabre Reference bring about equal amount of raw, non-noise shaped resolution to the table and the whole rest cannot mange even in theory 16 Bit performance without 40dB or more noisgaping.
Ciao T
This "basic DAC" was at the time (over 25 Years ago) Philips best and in terms of ENOB etc. it is very close to the limits for a 16 Bit Device, especially considering it offered this by design, without the need for laser trimming resistors etc. as found with AD and BB Audio DAC's.
In it's time was probably THE High End DAC, in terms of subjective performance it also still quite competitive in this day and age...
It also is worth noting that in terms of raw, direct resolution (not noise shaped) only the PCM1704 exceeds the TDA1541 among audio DAC's in current production, while the ESS Sabre Reference bring about equal amount of raw, non-noise shaped resolution to the table and the whole rest cannot mange even in theory 16 Bit performance without 40dB or more noisgaping.
Ciao T
Yeah.... Let me give it a try:
--> +5 and current output are related, so the output stage ideally balances the currents sourced from/sinking into the differential pair inside the tda (this is by the way how John Brown has done it). Furthermore, The +5 supply rail can be decoupled to agnd.
--> -15 and -5 are related, so decoupling between these these two voltage rails closes this loop (currents run from -15 into -5)
--> -5 is can be coupled to dgnd (remaining currents run to 0v)
--> Decoupling caps can be coupled to agnd
That was an attempt. Be gentle. 😱
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Hi,
Another way of saying this is to state the actual current return point for Iout is not Agnd but +5V, so strictly speaking +5V serves as analogue reference point.
However +5V is also the digotal supply line and needs a low impedance connection there (marce, is the digotal plane under the TDA1541 becoming clearer? 😉 (
This is the beginning of understanding, but not complete.
Ideally +5V and -15V and AGND and DGND are held at PRECISELY the same AC potential from a few Hz to a few MHz. The -5V supply is a little different, but can be treated the same (same AC as AGND & DGND).
This is (as said) not really the case and if we cannot make the potentials the same we need to consider which currents matter most.
Layout is just one part of optimisation, non-standard approaches to decoupling supplies and regulation may also be needed. For example, my design uses shunt regulators with around 0.03 Ohm Impedance in the audio range and all decoupling is matched against this impedance, to generate as flat an impedance from DC to tens of MHz...
A lot of this optimisation needs a LOT of resources, I have yet to see a Kit or DIY DAC that comes close except ecdesigns.
Incidentally, I I find it funny that ecdesigns arrived with a lot of cirtuotus detours and effort at something that (clocks and I/V excepted) is not far from AMR's design ca. 2005...
Our clocks are a bit more commercial, we basically get a mil spec supplier to make them for us in a can, I doubt they perform much worse... But you need to buy 100's to get the spec and acceptable pricing.
I/V, well I stick to my own from the late 90's... 😉
Ciao T
Another way of saying this is to state the actual current return point for Iout is not Agnd but +5V, so strictly speaking +5V serves as analogue reference point.
However +5V is also the digotal supply line and needs a low impedance connection there (marce, is the digotal plane under the TDA1541 becoming clearer? 😉 (
This is the beginning of understanding, but not complete.
Ideally +5V and -15V and AGND and DGND are held at PRECISELY the same AC potential from a few Hz to a few MHz. The -5V supply is a little different, but can be treated the same (same AC as AGND & DGND).
This is (as said) not really the case and if we cannot make the potentials the same we need to consider which currents matter most.
Layout is just one part of optimisation, non-standard approaches to decoupling supplies and regulation may also be needed. For example, my design uses shunt regulators with around 0.03 Ohm Impedance in the audio range and all decoupling is matched against this impedance, to generate as flat an impedance from DC to tens of MHz...
A lot of this optimisation needs a LOT of resources, I have yet to see a Kit or DIY DAC that comes close except ecdesigns.
Incidentally, I I find it funny that ecdesigns arrived with a lot of cirtuotus detours and effort at something that (clocks and I/V excepted) is not far from AMR's design ca. 2005...
Our clocks are a bit more commercial, we basically get a mil spec supplier to make them for us in a can, I doubt they perform much worse... But you need to buy 100's to get the spec and acceptable pricing.
I/V, well I stick to my own from the late 90's... 😉
Ciao T
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