AD1862 Stop-Clock
I did this PCB half year ago and somehow forget to post it here and today found it
It incorporates the Stop-Clock system. What does that mean? Simply: The BCK (clock) is off while no data are present for DAC chip.
I don't know if it has any positive impact on the AD1862 chip, but only 4 digital chips are on the PCB instead of 6
Hello Miro,
is this design the same as the stop lock version you had posted here already? This one
Both are marked v. 2.0....
I ask to know if it has the error you detected because It is the version I have and have not yet populated. If not, what are the differences with the very last one you posted yesterday?
BR
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Looks like the I2StoPcm from Iancanada board. It is slavered by a masterclock with an uf-l injection Mclk in. Close from JLsounds board. In iancanada sys, the fifo is before though...only I2S is aligned and I assume further jitter comes with the fgpa processing despite the clean clock injection.
I have not tested with the ad1862 ufl board cause they still go through tje shift registerq and I didn t want to strap the pads of the register area.
I have 3 boards of the I2StoPcm for sale...at least 2 I keep one.
I have not tested with the ad1862 ufl board cause they still go through tje shift registerq and I didn t want to strap the pads of the register area.
I have 3 boards of the I2StoPcm for sale...at least 2 I keep one.
@swak Oh, I posted it (v2.0) in the past .... ok, that means it has the error.
You can bypass the error by a wire jumper (you can easily read it from the schematic, it is the LRCKL wire for the left DAC chip (and break the older LRCK trace for left DAC chip on the PCB)) .... or order the corrected PCB, hopefully it is without errors
.... ok, that means it has the error.You can bypass the error by a wire jumper (you can easily read it from the schematic, it is the LRCKL wire for the left DAC chip (and break the older LRCK trace for left DAC chip on the PCB)) .... or order the corrected PCB, hopefully it is without errors
I would ask a more specific question. How does the AD1865 N-K sound? Which is in this player here
https: //www.stereophile.com/content/audio-note-cd-41x-cd-player
"We've done comparisons," Peter Qvortrup said, "and I consider the AD to be the best-sounding converter, by far."
Is this true?
Quertion is specific, Miro's AD1862 vs. Miro's AD1865I would ask a more specific question. How does the AD1865 N-K sound? Which is in this player here
https: //www.stereophile.com/content/audio-note-cd-41x-cd-player
"We've done comparisons," Peter Qvortrup said, "and I consider the AD to be the best-sounding converter, by far."
Is this true?
Fellas, you know these types of questions are impossible to answer? The dac chip is only a part of the whole package. Miro has made it very easy for anyone to try these dac chips, for relatively low cost, in your own creative package. Give them a try! And its a great deal of fun along the way. 
Miro, would it be possible to throw up an image showing what to cut and where to insert a jumper? If the board is salvagable, then we could at least test the stop clock system and compare.....@swak Oh, I posted it (v2.0) in the past
You can bypass the error by a wire jumper (you can easily read it from the schematic, it is the LRCKL wire for the left DAC chip (and break the older LRCK trace for left DAC chip on the PCB)) .... or order the corrected PCB, hopefully it is without errors
@jpk73 MCLK is good, but do the reclock with something like the ripple counter, not the flip-flop
Why should the ripple counter add less jitter than a fast single gate flip flop? The HC4040 consists of a bunch of flip flops after all...?
EDIT: here it was mentioned how much jitter the 4040 adds!
EDIT2: this might be of interest as well...
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I am still not ready to compare, but I am working on PMD100/200 and tested the Kusy board. I veryfied that the Ti SRC sounded much better than upsamling in the PC, that was the biggest surprise... As for the AD1862: I plan to use the PMD200 and make a proper stopped clock logic with a reclocked and delayed LE to have the analog output updated during a digitally silent moment. That's what stopped clock is about as far as I understood...
Attachments
You can do that from flip-flops, but you must generate the LRCK directly from the master clock (like the HC4040 does) ... it divide the MCLK (or presious crystal clock) directly and generates the proper LRCK.
If you are referring the old (jittered) LRCK for generating new LRCK through flip-flop, you will get jittered LRCK because one flip-flop works only like a valve controlled by the MCLK (if jitter in old LRCK is larger than one MCLK cycle, it will be transfered to the new LRCK --- that is why you need the clean generation based on division instead of referencing the old LRCK).
I have miro boards in 1862, 1865, and PCM56, all with the same analog components. All sound good. The 1865 and PCM56 might be a little less rich. There is way more tuning possible with analog components and the output stage than variance between the chips.Who has both?
IMO if you can get 1862 chips build that.
...and I will add oap 1655 or 1656 with Pan Fc cap 47 or 100 uF in 3mm pitch leads with the green resistor is a good combo...nice. better than the opa627 at home. But didn t try oap861 and LM Miro s favorite video oap which should has better bass. Nich KZ were not good in the analog in my whole setup
YMMV. But hope that helps
YMMV. But hope that helps