current sourced cascoded BLS schematic

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ftorres said:
Well, due to the tremendous demand (how quick you are 😉), and if you promise me to be good boys 'till Monday, I'll post it.

The attenuators are straightforward, and can be calculated quite simply. You can make your own steps, provided that the larger step is 8 times higher than the small one.

I'll sure will be having difficulties to explain the MBB sequence in english... May you forgive me 🙁
I FOR GIVE You
ftorres
if NO ONE else does
BE ING from Sverige

I know how it feels!
how is weather in france , today

- 😛 How Does It Feel 😛 - SLADE
from Album "Slade in FLAME"
decades ago
Including
"Them kinda Monkees can't Sing" - ( but sure can Swing )

please for give me - can you?
 
??

Is that whatever as in "makes no difference" or whatever as in "not worth replying to your questions"? I hope you aren't offended or anything. No offense meant of course. I am really just curious: why not eliminate one of the bias networks?
 
no thanks

SteveG said:
Hey, sounds good! Thanks for the help. Have you ever thought of using fets instead of relays?
Steve

Janneman
No, 4051 only closes 1 of 8 Jfets-switch.
So only 1 resistor at the time is connected to GND.
Yes, the lowest resistor is the crushial point
when using JFETS with R-on in the magnitude 50 ohms.

To achieve a result satisfactory to your
acceptance of evnetually distortion
you have to calculate how big is R-on
variations in relation to R1+R2+Ron.

A way around that, for ultimate solution is using
DRY reed relays to switch.

This is my favorite
DSS41A05= needs some 8mA to switch
http://www.alliedelec.com/catalog/c...es/2002/712.pdf

from a post I had to write a guy some time ago

I do not expect a plain THANK YOU
never do

gratitude never hurts

gro
 
Everyone who like to know something about jfet should read the applicationnotes on the following page :

http://www.vishay.com/brands/siliconix/SSFan.html

And Groman why talk about 4051 .. Has nothing to do with a JFET switch.
By the way .. 4051 is OLD.. Try look at the new ones from siliconix :
http://www.vishay.com/brands/siliconix/ASsgas.html

What you say about rds(on) resistance nearly is right but today you can get switches who have a deltaRDS(on) of only a few ohm over a wide area... That is what makes up the most distortion!! not the static RDS(on) but the deltaRDS(on)!

Sonny
 
oops! I don't know what happened to the rest of my post, but it was cut off... Let me try this again.
I see your point, but the circuit was just for simulation... Yes, I will be using a single bias network for the cascodes- no point in using two.
I want to use so many pots so that each current source is individually adjustable, and so that the gain can be easily adjusted to match channels. I tried one pot feeding current to both halves of the amp, but I like having that gain adjustment in there. What exactly do you mean about the 1 ohm resistors? Is that an odd value or something?
Steve
 
current sensing resistors

No, I was thinking that if you went back to two current sources -- I did on my design -- the resistor in the current source can act as the current sense. But your 1Ohm current sensor would be slightly more accurate if you are worried about the contribution of the base current. In which case, you would be really hardcore, but maybe ....

I'll post up my schematic here later today. I used BJTs for all the cascodes and current sources, and LEDs for the biasing networks all the way around. Basically what you did, except with four more BJTs and two fewer MOSFETs.
 
sounds good... looking forward to seeing it! I was going to go with a bipolar source/cascode design too, but I've had many people say that the sound will be better with an all MOSFET design. What do you think about that? Is it a line of garbage? I would be interested in hearing why you decided on bipolars. From what I have been told, they make better current sources.
I have not decided on whether I will go with just a current sourced design, or with the cascodes as well. Technically, the cascodes seem like a great way to reduce distortion- as I understand it, by reducing the input capacitance which is a big part of the distortion in a MOSFET design. But, I have also heard that they may be sonically inferior, although I can't imagine why. Simpler gain path? Something was said about dynamics being somewhat more compressed. I may have to try it both ways.
Are you planning on running more bias current through your design? My final plans were very similar to what someone else posted in this thread (can't remember who at the moment. I will up the rail voltage and run the current at about 80mA per side- MOSFET casodes and MOSFET current sources.
Can't wait to see your final design. I have learned a lot from simulating this circuit- it is interesting all the things that you can do with this simple little circuit. You'll have to give us details on how it sounds when you're finished.
Steve
 
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