I agree that LF can be a challenge for both DACs and Class D amps. One recent example was the Wiim Pro Plus streamer. Amir tested the older revision that had an issue with rising distortion below 1 kHz, the newer revisions fixed that problem. Interestingly, the E-MU 1212m soundcard also needed a beefier buffer cap on the Vref supply of the AK5394A ADC for low noise and low distortion at LF.
I would imagine that supply sag caused by a LF signal would affect DAC and ADC in the same way and hence cancel, but I guess it depends on the specific chips and peripherial circuits, so one would have to try.
I would imagine that supply sag caused by a LF signal would affect DAC and ADC in the same way and hence cancel, but I guess it depends on the specific chips and peripherial circuits, so one would have to try.
Many (all?) AKM ADC data sheets make reference to THD vs Vref cap size.
High capacitance though increases Vref settling time and may cause offset calibration issues (need to repeat cal after Vref settling)
George
hi, i've ordered boards via JLCPCB and now questions regarding BOM are coming 🙂)
-what size are R1/R2 10ohm resistors (power rating?) ?
-R3-R12 are 0207 package 200ohm 50ppm 1W (like MMB02070C2000FB200). do those resistors need to be thin film ones? what tolerance is acceptable (should be matched as close as possible or 1%=no matching is OK)?
-is it possible to use R3-R12 resistors with lower power ratting and higher tolerance (like 0,75W or 0,5W and 2512 package)?
-DIP switch DSHP06TSGER is not readily available in EU. i'll use omron A6HF-6102-P or CUI DS05-127-2-06BK-SMT-TR
-[ XLR1 = Neutrik NC3FBH2 ] /[ XLR2 = Neutrik NC3MBH ] would be OK?
is above correct 🙂 ?
also - you've mentioned about separate DC-blocker board. what about this one?
I got an interesting result with 1st ord HPF(built in the XLR cable external 100nF to the ADC input impedance 1k) for the IMD. The 60hz component was reduced by about 20db, and ADC's IMD contribution was reduced. The first FFT is a standard cable from 9039Q2M, the IMD is about -120db, next one is the same cable but with 2 caps 1206 C0G 100nF, and the IMD is -130db.
Hmm, what are you trying to tell us? You reduced one of the fundamentals and hence got less IMD. This is an expected result, isn't it?
Let's imagine that we measure a DAC, and we need the DAC's IMD only, I offer the method to reduce ADC's contribution of IMD.
I have no idea why people asking me for the SPDIF.. Ok, this is the SPDIF FW, I tested that with Cosmos ADCiso but it should be Ok with the original Cosmos ADC as well. The SPDIF output is routed to the MCLK pin of the PCB header, you can get +5V and GND over there and simply add TOSLINK optical output. The USB data transfer keeps working as well 44.1-768k, however, SPDIF will stop working >192k(it works but the frequency isn't standard so no one SPDIF receiver can get that).
Not quite clear on what you are doing. Where are the caps placed, at the ends of the cable or something? In series to make a high pass? Also, what is capacitance of the cable itself?
Also if this is an SMPTE test, aren't the amplitude ratios of the test signals suppose to be kept the same for different trials?
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you know, only 2-3 users ever asked me for SPDIF, others are happy with USB, completely.
SMPTE/DIN and MOD IMD take into account only intermodes around 7kHz(MOD IMD), or intermodes around 7kHz + noise for SMPTE/DIN.
@IVX
I got accidentally 15 V DC at the Cosmos Iso ADC input set to 1.7 V sensitivity. ADC now has its internal noise + distortion floor at the correct -127 dBFs, but all external voltages are measured wrong. External signal results with higher noise floor than it was measured before but with lower signal magnitude. What parts of input protection or voltage divider could be burned. Or could it be the ADC itself is burned?
I got accidentally 15 V DC at the Cosmos Iso ADC input set to 1.7 V sensitivity. ADC now has its internal noise + distortion floor at the correct -127 dBFs, but all external voltages are measured wrong. External signal results with higher noise floor than it was measured before but with lower signal magnitude. What parts of input protection or voltage divider could be burned. Or could it be the ADC itself is burned?
I guess you may burn the input alcaps 220uF/16V, it seems 9822 and opamps are Ok. Anyway, alcaps are easy to replace, opamps could be replaced with opa1612, and resistors couldn't be burned but better to measure as well. Did you feed 15Vdc to both channels?
Yes, it was a mono mode with input splitter XLR.
Seems that only L channel got a hit. R channel measures OK. At the left input, there are four 0603 SMD resistors, of which two measure as 20 Ω and two either 20 mΩ or short circuit. At the right input, there are only three 0603 resistors, two measure as 20 Ω and one as something like 20 mΩ.
Capacitors measure as infinite resistance in one direction and as MΩ in another.
Edit: I was measuring small SMD capacitors at the input. Electrolytic capacitors all measure as 190 – 210 uF on board.
Seems that only L channel got a hit. R channel measures OK. At the left input, there are four 0603 SMD resistors, of which two measure as 20 Ω and two either 20 mΩ or short circuit. At the right input, there are only three 0603 resistors, two measure as 20 Ω and one as something like 20 mΩ.
Capacitors measure as infinite resistance in one direction and as MΩ in another.
Edit: I was measuring small SMD capacitors at the input. Electrolytic capacitors all measure as 190 – 210 uF on board.
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Good news. It seems that 15 V DC at the ADC input is not something to be afraid of. 😀
Upon remembering that feeding single channel in mono mode will result with measured – 6 dB signal magnitude, I’ve checked all again without interpreting every measured deviation from expected as a bad sign. Both channels measure now the same and mono mode is OK if I don’t forget that low input impedance will overload signal generator and drop output voltage and elevate noise floor.
@IVX Sorry to take your time for nothing but now we know how really this design is robust. 👍👍
Upon remembering that feeding single channel in mono mode will result with measured – 6 dB signal magnitude, I’ve checked all again without interpreting every measured deviation from expected as a bad sign. Both channels measure now the same and mono mode is OK if I don’t forget that low input impedance will overload signal generator and drop output voltage and elevate noise floor.
@IVX Sorry to take your time for nothing but now we know how really this design is robust. 👍👍
@IVX: I reckon you may be busy so just a couple of quick questions (and a short reply is fine) ...
How likely is it that you will make an integrated ADC/DAC solution with same clocks, and if likely, when will it then appear as a product (realistic estimate)?
If not likely when do you then think that your best performing DAC will appear as a product? I can see on your website that there are a couple of photos so, well, is it close to release?
I would appreciate your feedback on this ...
Cheers, Jesper
How likely is it that you will make an integrated ADC/DAC solution with same clocks, and if likely, when will it then appear as a product (realistic estimate)?
If not likely when do you then think that your best performing DAC will appear as a product? I can see on your website that there are a couple of photos so, well, is it close to release?
I would appreciate your feedback on this ...
Cheers, Jesper
I have no plans for ADC/DAC so far. Currently, I'm busy with 9039S portable DAC, refining the PCB layout.