I'll probably get around to doing something like that using the AP-2722. Problem for me is that i use other engineers to do the implementation and build et al. Only when I get to working on them myself, I find things of interest to me. A lot of SIM is good but the thermals etal-- esp for biasing for minimum THD- is also a physical design/development that doesnt easily show up on SIM. So, I invest in good software for SIM and invest in good test equipment.
THx-RNMarsh
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Richard,
I do appreciate the difference between simulation and a real physical end result. I saw this numerous time in aerospace in composites when they would use simulations to predict shrinkage and changes in contour, they never did correlate to each other, sims only got you in the ballpark and then actual dimensional changes had to be looked at after first article was produced. I would think with all the parasitic parameters that are missing in models that you would see the same thing in electronic simulations vs real world testing of a completed circuit on a board.
I do appreciate the difference between simulation and a real physical end result. I saw this numerous time in aerospace in composites when they would use simulations to predict shrinkage and changes in contour, they never did correlate to each other, sims only got you in the ballpark and then actual dimensional changes had to be looked at after first article was produced. I would think with all the parasitic parameters that are missing in models that you would see the same thing in electronic simulations vs real world testing of a completed circuit on a board.
Vbe was not erroneously mentioned, you have to read Self, Vq is just what you measure to set the bias.
Cool , I learned (created a altered mental picture). 😎
Combining the symmetrical miller (and lead-lag) IS 2 pole comp. and should behave
in a similar way.
I do notice that this method does work much better on a CFA (no THD increase).
When it is used on either my folded cascode VFA or "symasym" the
"tradeoff" of total THD vs. components is evident.
I'm beginning to know the "why" 😎 .
OS
Combining the symmetrical miller (and lead-lag) IS 2 pole comp. and should behave
in a similar way.
I do notice that this method does work much better on a CFA (no THD increase).
When it is used on either my folded cascode VFA or "symasym" the
"tradeoff" of total THD vs. components is evident.
I'm beginning to know the "why" 😎 .
OS
I thought I already mentioned: the output stage is built with 8 pairs of Onsemi MJL3281/1302 devices, bolted on a large block of aluminum and P to P wired (no PCB) in a triple configuration, drivers are another MJL pair, pre-drivers are 2SA1930/2SC5171. 1800uF/100V to ground decoupling for each output device collector. 2.2 ohm base stoppers, 0.33 ohm emitter resistors (wish I could go lower, but 0.22 ohm would already require matched output devices, which I can't do, without matching, current hogging occured).
Power was provided by two 100V/16A lab switching PS, at +/-90Vdc.
Any pics? Is it lab research project for theory testing purposes only or are there some enterprise intentions behind?
Just a lab model for my own fun, meantime I dismantled the OPS and recycled the aluminum block for another project (not audio). So, sorry, no pics available.
I suppose you're right about the term TPC in the general case, but in my experience TPC has always meant split Miller capacitors with the junction returned to ground. Whether it includes a shunt compensation element in its behavior is a matter of degree. It depends on the ratio chosen for C1 and C2. It is clear that in some extreme cases, the combination of C2 and the resistor can dominate to the extent that the shunt aspect will play a big role, but I don't believe that this is usually the case. Also, if the TPC feedback is taken from the pre-driver, then there is clearly no shunt compensation aspect to the behavior of TPC.
Cheers,
Bob
Straight miller comp for VFA is suboptimal, because alternative comp schemes like TMC, TPC and MIC allow more feedback at HF and/or support higher SR's with lower tail currents.
With regard to the higher ULGFs observed in CFAs, if the TIS/TAS input capacitance is low, the phase shift through the front end stage is lower. At HF, the overall phase accumulation is lower, so you are able to close the loop at higher freqs. This does not violate minimum phase by the way! The generally lower OLGs also mean the second pole gain magnitude is close to, or even below the ULGF, again, supporting higher ULGF.
In a VFA, the gains are much higher, and the 2nd pole gain magnitude is almost always above the ULGF, necessitating lower ULGF.
The key thing, and this is the difference between what you see in opamp CFA and VFA's, is that you have c. 60 degrees of PM at the ULGF in a power amp to cater for wide capacitive load ranges.
With regard to the higher ULGFs observed in CFAs, if the TIS/TAS input capacitance is low, the phase shift through the front end stage is lower. At HF, the overall phase accumulation is lower, so you are able to close the loop at higher freqs. This does not violate minimum phase by the way! The generally lower OLGs also mean the second pole gain magnitude is close to, or even below the ULGF, again, supporting higher ULGF.
In a VFA, the gains are much higher, and the 2nd pole gain magnitude is almost always above the ULGF, necessitating lower ULGF.
The key thing, and this is the difference between what you see in opamp CFA and VFA's, is that you have c. 60 degrees of PM at the ULGF in a power amp to cater for wide capacitive load ranges.
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Actually CFP output demands low idle currents for good xover behaviour.
This makes it more difficult to keep xover down under dynamic conditions. In many (all?) CFP amps, if you run the amp at high power and then immediately measure THD at 1W while the amp is still hot, you'll find severe xover artifacts which weren't there when the amp is at its 'normal' temperature.
It's likely this has a far greater audible effect than the slightly lower THD at full power of CFP over EF2 outputs.
Of course careful thermal management can alleviate this but I've yet to see a CFP amp which doesn't exhibit this nasty behaviour.
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Also CFP amps have poorer performance at lower levels. The 2 pics are from Self's 4th edition. Can anyone with the latest 5th edition see if he's done anymore 'real life' work on this?
Better still .. has anyone here done any 'real life' work on this?
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I'm playing with such a beast but non est tantum facile.
You need to decide what should happen when the amp is giving zillion volts & amps to the speaker and also immediately after.
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Can we drop the semantic pedantic 'yus are all idiots & deaf' arguments? Does it really help anyone except da pedants if TPC introduces an element of evil shunt compensation?
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I see the same thing happen with EF2 output..... after the signal is removed, the bias drops to very low level for awhile and then slowly returns to set level.
This is a bias circuit issue not an OPS issue/type. yes?
THx-RNMarsh
I see this effect in any OPS, no matter EF or CFP. Bias circuit gets hot and sets lower quiescent current for OPS. It takes some time to cool down and come back to the initial setting.
So, in my opinion, it is not related to the OPS topology (well, maybe some of them cool down a bit faster than the others, but no dramatic difference).
So, in my opinion, it is not related to the OPS topology (well, maybe some of them cool down a bit faster than the others, but no dramatic difference).
Musical Fidelity B1
Alternative approach to bias management.
Musical Fidelity A1 / B1. No thermal feedback (thus no inertia related to it). Instead - OPS current sensing. Separate global NFB loops and individual bias setting for each shoulder.
Not sure this is the way to go, however - interesting approach...
Alternative approach to bias management.
Musical Fidelity A1 / B1. No thermal feedback (thus no inertia related to it). Instead - OPS current sensing. Separate global NFB loops and individual bias setting for each shoulder.
Not sure this is the way to go, however - interesting approach...
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The A1 is a Class A amp. Easy to set & maintain bias. Dunno what a B1 is but the circuit looks like it is AB with huge bias. Again no problem. See Self for 'how to'.
There are EF2 amps which don't do this and I've designed one or two myself to get around this.
Self is worth reading for the tools to design this but he doesn't get all his priorities right as far as bias thermal management goes. Bob Cordell also has good stuff on this.
I've never seen a CFP amp that doesn't suffer this. Marshy's 'low THD valley' is too narrow to sit there under all conditions. I'm sure Bob has also seen this phenomena.
EF2's 'valley' is much wider and easier for mere mortals to get right.
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Anyone with Self's new 6th ed. and can comment on low level performance of CFP vs EF2 according to Self ?
A search revealed no trace of any "Sassen" with any connection to feedback theory.
There is indeed a paper by the esteemed Willy Sansen on "Feedback Transimpedance & Current Amplifiers" (actually Ch. 14 in ADEssentials).
It does cover shunt feedback but this is in the context of shunt versus series feedback i.e. low output impedance versus current source output.
As has been frequently pointed out, our so called "CFA" amps are still low impedance, shunt feedback amplifiers, just like the VFAs.
The chapter does not cover shunt compensation.
Unless I see a more plausible reference I assume that Manso's claims are based on a faulty recollection of this work.
Confusion perhaps partly from the inconsistent use of "current feedback" by different people to mean both "series feedback" or "shunt feedback into a low impedance node".
Unsatisfactory nomenclature so be careful out there😉
Best wishes
David
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Clearly, but also mostly incorrect.
Comparing Miller (single pole) with TPC, TMC (two poles) is not apple to apple, so you can't say that Miller is suboptimal. Bananas are sweeter than apples, this doesn't make apples "suboptimal sweet". MIC is first order compensation, but it is... Miller by all means.
TPC, TMC and MIC do not, per se, allow higher slew rates. Once and forever, SR is a nonlinear large, signal effect, where the input stage saturates and the compensation cap is charged by whatever current is available (tail current for the standard long tail pair input stage VFAs, the feedback network current for the CFAs).
The comment about the "higher ULGFs observed in CFAs" is
. The regular CFA topology trades open loop gain for bandwidth, practically because the input stage has unity gain (instead of a transconductance gain, like in VFAs) and, being an emitter follower, has a large bandwidth. Nevertheless, the open loop gain-bandwidth product is about the same as in a VFA. To add insult to injury, as long as the OPS is ultimately limiting the open loop bandwidth (and the total phase shift), increasing the ULGF always reduces the stability margins, CFA or VFA, doesn't matter.
Invoking "minimum phase" doesn't have any sense in this context.
Because you mentioned stability in capacitive loads, all CFAs that I've ever seen are much sensitive to capacitive loads than their VFA counterparts, a look in the TI reference white papers on CFAs will shed some light as of why. The Zobel and the output inductor helps, of course, but it is fair to say that a CFA requires much more careful design of the output network. While with a conservatively designed VFA you may get along without an output inductor, for a CFA this is very unlikely.
There is a Sander Sassen, author of an interesting Class A amplifier ExtremA, a reference class-A DIY amplifier. - Introduction but this obviously has nothing to do with the shunt compensation topic.