CFA Topology Audio Amplifiers

Can they be tried in the circuit under LTSpice? Is it worth the cost? Is there an advantage?

I've tried substituting in the models THAT provide and THD goes up significantly. Suspect they'll be better in real life. I have purchased some for future experiments once I have settled on a design.

One advantage would be that you don't need to do any matching and another would be thermal coupling. A disadvantage is their low Vce
 
The circuit below is tested and works very well. Feel free to ask....
It is in 3 parts from left to right.


  1. Diamond buffer itself.
  2. Current source
  3. Shunt regulator for the diamond buffer providing +/-15V.
I use industry standard jfet for cascoding stages with constant current.


for P-channel:

  • MMBFJ174 - MMBFJ177
for N-channel:

  • MMBFJ111 - MMBFJ113
But basicly to get a desired voltage drop across the transistor i cascode.


It uses BC847BPN (NPN and PNP on the same die) to compensate for temperature drift to get minimum offset. It is U1 to U6.


For the mirrors it uses BCM847BS and BCM857BS.



The output from the diamond buffer uses DZT5551 and DZT5401 (Q5 and Q6). The are cheap and easy to get. The case is SOT223 so they can easily dissipate 500mW and up to 2W under the right circumstances.



They also perform well in the VAS stage. Not as good as KSC3503 and KSA1381 but still very good.



Right now there is a lot of writing about Matched pair especially That340.

In general there is no perfect match between NPN and PNP. They can try to get vbe drop identical, or hfe identical.

But if you look on hfe versus ic they are never identical. They are close but not identical.

Regarding matched pairs. Today you will find matched NPN's or matched PNP's and they are cheap. But not matched NPN/PNP.
 

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Sometimes I use 2N3904/3906 in quad arrays for current mirrors,
Sonny the stacked Wilson you have here are they better than a single with a beta helper..??

Also I have seen problems by cascoding with jfets, with low current it's no problem at all, but if you want to push some current it can be hard to find high IDSS pairs. The jfet cascode gives significant impedance improvement especially in the higher frequencies.
 
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Sometimes I use 2N3904/3906 in arrays for current mirrors,
Sonny the stacked Wilson you have here are they better than a single with a beta helper..??

Also I have seen problems by cascoding with jfets, with low current it's no problem at all, but if you want to push some current it can be hard to find high IDSS pairs. The jfet cascode gives significant impedance improvement especially in the higher frequencies.

Michael i understand what you mean but i only use them where the current is constant. 1mA and 3mA - the current only changes a few % where they are used.

The use of cascode current mirror raises the current generators output impedance. It is a modified Wilson current mirror to reduce difference between In and out
 
Michael i understand what you mean but i only use them where the current is constant. 1mA and 3mA - the current only changes a few % where they are used.

The use of cascode current mirror raises the current generators output impedance. It is a modified Wilson current mirror to reduce difference between In and out

I have simulated with jfet cascodes, It looks really good, and when currents are as low as 1-3 mA I do believe they are really beneficial. In your design they may be overkill though, as i believe the mirrors really are the ones setting the output impedance of your housekeeping.

How much does the stacked wilson improver over a single mirror...??
 
I have simulated with jfet cascodes, It looks really good, and when currents are as low as 1-3 mA I do believe they are really beneficial. In your design they may be overkill though, as i believe the mirrors really are the ones setting the output impedance of your housekeeping.

How much does the stacked wilson improver over a single mirror...??

In the case of U5 and U6 it is only to reduce powerconsumption to minimize delta vbe change as a funktion of temperature rise.

Regarding the Wilson current mirror. The output impedance is (beta/2) times better over a std. Current mirror but i cannot remember my sim result right now.
 
Oh, Scott, can-you explain us the problem of industrially producing matched PNP/NPN devices (preferably in one package). There is so much need for such devices.

The problem is not diff-pair matching but absolute Vbe matching from NPN to PNP. Typically at 100uA an NPN might be 600mV but a PNP 570mV or visa versa. The CFA diamond input as opposed to the diode connected input has a large offset issue.

As others have said it's just holes vs electrons, good transistors on the same substrate just have different absolute Vbe's.
 
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There's also the multi-tanh approach.

Thank you for the reply, I am interested in the idea.
I read Barrie Gilbert's paper on multi-tanh a while back.
He discusses noise costs.
At first impression it seems the multiple transistors could actually reduce noise because they are in parallel, albeit not optimised for noise reduction.
Is there a simple, conceptual explanation for the noise cost?
Or another reference?

Best wishes
David
 
Thank you for the reply, I am interested in the idea.
I read Barrie Gilbert's paper on multi-tanh a while back.
He discusses noise costs.
At first impression it seems the multiple transistors could actually reduce noise because they are in parallel, albeit not optimised for noise reduction.
Is there a simple, conceptual explanation for the noise cost?
Or another reference?

Best wishes
David

The current ratios are unfavorable for minimum SNR but getting the absolutely lowest noise at the same time as perfect linearity is not necessary. The whole picture needs an article to make all the tradeoffs clear.