Yes, I agree with you that Vogel was wrong with noise correlations in a DC-compensated OpAmp inputs. I never use neither dc-compensated nor chopper OpAmps. but only eTrimed OPA192 [ https://www.patreon.com/posts/skhema-gerbery-i-86997687 ] , with jfe2140 input it is 0,25 uV IEC-A wtd input noise [ https://c10.patreonusercontent.com/...=w22-qmuifexGJRw0g_yfwQcRtlRUl11DLsqH8xp4xrg= ]
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Mark, thanks for an interesting anaylsis, especially around excess loop gain and noise contributions. The synthesised input resistance is a nice feature too.
A thought I had, looking at the second stage pole/zero pair: whilst the overall gain rises (with falling frequency) from unity above 500Hz to x10/20dB below 50Hz, the transimpedance gain around U7 rises from 31.8k above 500Hz, all the way up to 10M (at about 1.6Hz), with the impedance of the R9/C5 series input pair rising linearly below 50Hz too (to maintain the LF gain of x10). What's the issue? I'm not exactly sure, but could you imagine the high impedance below 50Hz at the virtual earth input of U7 leading to a noise susceptibililty? Any current noise of U7 would see this high transimpedance gain, but as you've specified a FET-input opamp, and we're already downstream of ~32dB of gain, I can't imagine this is an issue.
How does this compare to creating the 3180us pole by shunting C3 with an appropriate resistor? C5 is then removed if acumulated DC offset is not an issue, otherwise it can of course be increased in value for DC blocking.
Interested in your thoughts on both of these.
I'd been having similar ponderings on an opamp MM phono preamp (here). It looks to me in your architecture that you too could convert the gain stage around U4 into a 2nd-order state variable HP filter to implement 2 poles of the rumble filter "for free" (excluding the cost of 2 dditional opamps rather than 1 in a Sallen-Key architecture of course). The low-pass roofing filter could still be maintained around such a stage.
Best regards!
Rich
A thought I had, looking at the second stage pole/zero pair: whilst the overall gain rises (with falling frequency) from unity above 500Hz to x10/20dB below 50Hz, the transimpedance gain around U7 rises from 31.8k above 500Hz, all the way up to 10M (at about 1.6Hz), with the impedance of the R9/C5 series input pair rising linearly below 50Hz too (to maintain the LF gain of x10). What's the issue? I'm not exactly sure, but could you imagine the high impedance below 50Hz at the virtual earth input of U7 leading to a noise susceptibililty? Any current noise of U7 would see this high transimpedance gain, but as you've specified a FET-input opamp, and we're already downstream of ~32dB of gain, I can't imagine this is an issue.
How does this compare to creating the 3180us pole by shunting C3 with an appropriate resistor? C5 is then removed if acumulated DC offset is not an issue, otherwise it can of course be increased in value for DC blocking.
Interested in your thoughts on both of these.
I'd been having similar ponderings on an opamp MM phono preamp (here). It looks to me in your architecture that you too could convert the gain stage around U4 into a 2nd-order state variable HP filter to implement 2 poles of the rumble filter "for free" (excluding the cost of 2 dditional opamps rather than 1 in a Sallen-Key architecture of course). The low-pass roofing filter could still be maintained around such a stage.
Best regards!
Rich
Sorry I've not got round to answering till now, been indesposed for a week. I hope to go into this in more detail soon - for now I should credit the writings of Doug Self for learning of the synthesized input resistance - you can view this as anti-bootstrapping, reducing the apparent impedance of the physical resistor used. Yet another case of more active stages allowing higher performance rather than less as some seem to think.
It's a bit silly I didn't see this before, but I think you can minimize the noise contribution of U6 by adding one resistor. When you replace R2 with, for example, a 600 ohm resistor to U6 and a 300 ohm resistor to ground and triple R12, the contribution of U6 to the equivalent input noise voltage is reduced by a factor of three, while the equivalent input noise current only gets a bit worse. I haven't thought about the effect on the input DC offset yet.