Building the ultimate NOS DAC using TDA1541A

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#4,621
Hi, -ecdesigns-
-ecdesigns- said:
I am now using 22KHz (post # 4615).
Click to expand...
If DEM generator frequency constitutes 22 kHz, per time of the sample shaping will not happen the interleaving a current passive divisors of the current that is to say will not happen their averaging. Hereunder principle DEM is emasculated and it not works.

Are you not alarmed?


For correct working DEM generator frequency must be multiple 4Fs or close towards this value. In this case at sample shaping will take part all 4 currents of the passive current divider. Frequency of the standard anisochronous generator constitutes approximately 200 kHz that near towards 4Fs=176 kHz.


 
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#4,622
Those are the active dividers. You would need exact 4x (or 8x, 16x, ...) DEM frequency if you did not use any external filtering capacitor, so that always 4 (8, ...) steps fall in a sample. Then perfect averaging would happen. But then the ripple would also appear on the output analog signal. In any other case, even at asynchronous DEM, the external capacitor filters the ripple. As long as this filtering is effective, it does not matter how is the DEM frequency related to the sampling frequency.
Not speaking here about on-chip interaction between the two signals, that have practical manufacturing and not theoretical reason, thoroughly explained by John in this thread.
With respect, Laszlo
 
#4,623
Hi Laszlo, & John,

About this filtering, with the DEM freq down to about 44 or 22kHz ....

In any other case, even at asynchronous DEM, the external capacitor filters the ripple. As long as this filtering is effective, it does not matter how is the DEM frequency related to the sampling frequency.

If there was an extra R-C network added to each external cap (another 2 SMD units) would the increased filtering be of any benefit?

If so, what would the initial trial/estimated values?
 
#4,624
oshifis said:
Those are the active dividers. You would need exact 4x (or 8x, 16x, ...) DEM frequency if you did not use any external filtering capacitor, so that always 4 (8, ...) steps fall in a sample. Then perfect averaging would happen. But then the ripple would also appear on the output analog signal. In any other case, even at asynchronous DEM, the external capacitor filters the ripple. As long as this filtering is effective, it does not matter how is the DEM frequency related to the sampling frequency.
Not speaking here about on-chip interaction between the two signals, that have practical manufacturing and not theoretical reason, thoroughly explained by John in this thread.
With respect, Laszlo
Click to expand...

So much is clear, however, wouldn't you need fDEM of at least 44khz to make sure the averaging is over 4 Dem steps during one word?

In my understanding, fDEM of 22khz gives averaging over 2 steps (inferior averaging compared to a 4 step cycle). As you say, it should not matter if fDEM is not an EXACT multiple (4,8,16) of fWS, as long as it is at least 44khz (so you get averaging over a full 4-step DEM cycle). For example, a 60khz fDEM would cycle through 5.4 steps per word (60/44 = 1.36 DEM cycle, consisting of 4 steps).

Am I Wrong?
 
#4,625
Hi, after so many time.

Why discusing about the DEM?. It's very easy to try it. Just test some different values of capacitor on the DEM.

With a great capacitor, let's say 1 to 2uf, it sounds very fine, more relaxed, but at very low levels, it make strange sound and noise. On the other side, with 10pf for example, it sounds very fine, maybe a little bit less relaxed, but with an incredible low noise at extreme low levels. You can see on the scope the waveforms at pins 16&17 in both cases. Differences are notable.

I imagine that John is trying some thing more, appart of changing the capacitor value, but at the moment, until he doesn't end his tests, he will say nothing.

Kind regards to all.
 
#4,626
oshifis said:
Those are the active dividers.
Click to expand...
You have not understood me. I implied passive dividers, which have included in active dividers, in composition of DEM cells.

oshifis said:
As long as this filtering is effective, it does not matter how is the DEM frequency related to the sampling frequency.
Click to expand...
This untrue.
oshifis said:
Not speaking here about on-chip interaction between the two signals, that have practical manufacturing and not theoretical reason, thoroughly explained by John in this thread.
Click to expand...
John is not authority in the area of TDA1541 working. Many his glances are wrong.
Get acquainted with articles of family TDA1540-TDA1541 developers, and a great deal in TDA1541 working is made clear.
 
#4,628
SSErg,
Perhaps you might like to enlighten us with your superior design - you are extremely critical of John's efforts and detailed explanations of his development progress that has made clear many aspects of this particular dac chip's behaviour to us "less technically skilled" people.
 
#4,629
studiostevus said:
So much is clear, however, wouldn't you need fDEM of at least 44khz to make sure the averaging is over 4 Dem steps during one word?

In my understanding, fDEM of 22khz gives averaging over 2 steps (inferior averaging compared to a 4 step cycle). As you say, it should not matter if fDEM is not an EXACT multiple (4,8,16) of fWS, as long as it is at least 44khz (so you get averaging over a full 4-step DEM cycle). For example, a 60khz fDEM would cycle through 5.4 steps per word (60/44 = 1.36 DEM cycle, consisting of 4 steps).

Am I Wrong?
Click to expand...
I think that averaging a given number of DEM samples over an fWS is not the correct view. Rather, we are filtering the ripple (AC content) from the DC of the given bit current.
 
#4,632
Hi, colleagues jameshillj, studiostevus and oshifis,
As judged by your postes, you bad visualize working of 1541. Do not study with divination, read the firsthands.
Here is else pair of the references.

http://www.vegalab.ru/forum/attachment.php?attachmentid=159182&d=1340644012


http://www.vegalab.ru/forum/attachment.php?attachmentid=159204&d=1340694699


I shall say only that frequency of the generator FDEM must be not lower 176 kHz (4Fs) that each current of the passive divider of the DEM cell has time to participate at averaging and at the bit current shaping.
 
#4,634
Hi SSerg,

I shall say only that frequency of the generator FDEM must be not lower 176 kHz (4Fs) that each current of the passive divider of the DEM cell has time to participate at averaging and at the bit current shaping.
Click to expand...

- TDA1541A typical application runs in 4 times oversampling.

- TDA1541A sample rate in a typical application equals 176.4 KHz.

- DEM clock frequency is specified between approx. 150 and 250 KHz.

- In a typical TDA1541A application the DEM switch advances roughly one time during each sample.
 
#4,635
Tda1541 dem has a 4-step pattern, which is visible when you remove the passive filter caps. It is my understanding that you want to run through at least all four steps during one word (fDEM = 4fWS) to achieve optimal averaging over these 4 steps.

Total averaging is a function of averaging the inacuracies in timing dt (jitter of the dem oscillator) and averaging the inaccuracies in current di (inaccuracies of the internal resistors in the tda1541, which are not laser trimmed) according to van der Plassche. Refer to the earlier link(s).
My understanding is that, if you run through -say- 16 dem steps during one word (fDEM = 16fWS), you would achieve better result as the inaccuracies in timing dt (jitter of the dem oscillator) would be averaged 16 times per word. The inaccuracies in di would be the same though as in the case above, as it would cycle through the same 4 steps, just 4 times per word this time. I understand from John though, that there are drawbacks in spikes when moving from one dem step to the other, which probably outweigh the advantage of 4 vs 16 steps per word (with a reasonable low jitter dem oscillator).

Still, cycling through 2 steps per word (fDEM = 2fWS) would give low averaging across the di axis (2 steps per word only) as well as across the dt axis. The advantage is only 2 spikes per word though, but i am unsure as to whether this outweighs the lack of averaging (otherwise, why implement dem at all?).

I could be certainly way off here, as i am by no means an expert, but i still don't see how a 22khz dem clock (fDEM = 2fWS when using no oversampling) would give a satisfactory result.... If anyone can explain where my understanding is flawed?
 
#4,636
studiostevus said:
Tda1541 dem has a 4-step pattern, which is visible when you remove the passive filter caps. It is my understanding that you want to run through at least all four steps during one word (fDEM = 4fWS) to achieve optimal averaging over these 4 steps.

Total averaging is a function of averaging the inacuracies in timing dt (jitter of the dem oscillator) and averaging the inaccuracies in current di (inaccuracies of the internal resistors in the tda1541, which are not laser trimmed) according to van der Plassche. Refer to the earlier link(s).
My understanding is that, if you run through -say- 16 dem steps during one word (fDEM = 16fWS), you would achieve better result as the inaccuracies in timing dt (jitter of the dem oscillator) would be averaged 16 times per word. The inaccuracies in di would be the same though as in the case above, as it would cycle through the same 4 steps, just 4 times per word this time. I understand from John though, that there are drawbacks in spikes when moving from one dem step to the other, which probably outweigh the advantage of 4 vs 16 steps per word (with a reasonable low jitter dem oscillator).

Still, cycling through 2 steps per word (fDEM = 2fWS) would give low averaging across the di axis (2 steps per word only) as well as across the dt axis. The advantage is only 2 spikes per word though, but i am unsure as to whether this outweighs the lack of averaging (otherwise, why implement dem at all?).

I could be certainly way off here, as i am by no means an expert, but i still don't see how a 22khz dem clock (fDEM = 2fWS when using no oversampling) would give a satisfactory result.... If anyone can explain where my understanding is flawed?
Click to expand...

I tend to share your thoughts, but the size of the external capacitor plays also a role i suppose. If it has higher capacitance, it will act like a voltage buffer and equalizes the (DEM) ripple to a moving average voltage? Viewed that way i can imagine that lower fDEM doesn't much affect the results of DEM. Then it is not related to 1 word, but time moving average.

In my personal experience (with 1uF cap) the optimum for my ears is around 60khz DEM. If i go higher (>100khz) the sound seems more refined but tends to irritate, if i go lower (<25khz) it becomes a bit lifeless. I find it hard to correlate the results. There's a lot going on in the chip 😕
 
#4,638
brubeck said:
I tend to share your thoughts, but the size of the external capacitor plays also a role i suppose. If it has higher capacitance, it will act like a voltage buffer and equalizes the (DEM) ripple to a moving average voltage? Viewed that way i can imagine that lower fDEM doesn't much affect the results of DEM. Then it is not related to 1 word, but time moving average.
Click to expand...
Moving average ~ low pass filtering
The internal resistance of the bit current generator and the external capacitor does exactly this. This arrangement simply can't take 4 DEM periods, average them (how? calculating the mathematical average?), take the next 4 DEM periods, do the same, etc. The only important thing is to have a precise 50% duty cycle of the DEM clock - as the cited article states. John also concluded that it can be best achived by decreasing the DEM frequency (and increasing the external capacitor at the same time).
 
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