The spidif (TTL level) inputs are still there. 
The header in the middle contains them.
Isolation would make the beta a board bit overly complex - so it is not there. It's actually a pretty sticky wicket. In short - you should not need it at all. After the beta - if it seems a good idea I may add them.
If you want isolation I would suggest use the teleporters.
As for external regs like the trident - there is a *very* good reason I am not using them in this particular application. It has to do with power sequencing... I will leave it at that.
As for clocks Brian and I have discussed two versions of the modules for people who don't care about the more expensive clocks. Perhaps we could even leave the clocks off for some.
The ICs you see on the board are bus multiplexers for dealing with the PCM/DSD/SPDIF signal routing to B3(and B3SE) etc.
There is also a clock buffer to protect the actual clock signal /BBB from the outside world - and to better align the clock input to the FFs.
Cheers!
Russ
The header in the middle contains them.Isolation would make the beta a board bit overly complex - so it is not there. It's actually a pretty sticky wicket. In short - you should not need it at all. After the beta - if it seems a good idea I may add them.
If you want isolation I would suggest use the teleporters.
As for external regs like the trident - there is a *very* good reason I am not using them in this particular application. It has to do with power sequencing... I will leave it at that.
As for clocks Brian and I have discussed two versions of the modules for people who don't care about the more expensive clocks. Perhaps we could even leave the clocks off for some.
The ICs you see on the board are bus multiplexers for dealing with the PCM/DSD/SPDIF signal routing to B3(and B3SE) etc.
There is also a clock buffer to protect the actual clock signal /BBB from the outside world - and to better align the clock input to the FFs.
Cheers!
Russ
That's reassuring about the inputs.
I can see the clock variations becoming a bit of a nightmare for you and Brian. Perhaps in future, you'll be able to satisfy everyone one with one brand (hah! - I like to have fantasies).
Hopefully, the Botic won't suffer from the software/documentation problems that scuppered the AC2 (but that seems unlikely).
It looks great, and up to the usual TP high standards. I just hope the final cost is just as attractive.
I can see the clock variations becoming a bit of a nightmare for you and Brian. Perhaps in future, you'll be able to satisfy everyone one with one brand (hah! - I like to have fantasies).
Hopefully, the Botic won't suffer from the software/documentation problems that scuppered the AC2 (but that seems unlikely).
It looks great, and up to the usual TP high standards. I just hope the final cost is just as attractive.
So a single good quality 5V power supply, connected to the BBB, could power both the BBB and the Botic? Assuming yes, I guess total draw will be <800mA?
Your Beta mock-up looks excellent btw.
Ray
Isolation would make the beta a board bit overly complex - so it is not there. It's actually a pretty sticky wicket. In short - you should not need it at all. After the beta - if it seems a good idea I may add them.
If you want isolation I would suggest use the teleporters.
As for external regs like the trident - there is a *very* good reason I am not using them in this particular application. It has to do with power sequencing... I will leave it at that.
Russ
So if I understand you there will be no reason to use an isolator?
I have some experience with power sequencing on a CD player; I klled a laser unit because the different power supplies did not reach working voltage in the right order at power up of the unit.
I expect that means that fooling around with the power supply on the board can destroy the bbb or components on the cape?
Regards,
Basically as with most SOCs (and other ICs) you should never apply a signal to any the GPIO pins until you know the power is good. In the case the BBB failure to do so can and will kill the BBB - if you read their docs they say so themselves. So you need to use the enable pin on the local reg to be sure the clocks and other inputs are not driven high until power is good.
That seems like a big ask from a placid. The issue would be how constant the load current is, so that the shunt (which I think is where the heat sinks come into play) can be set and not vary too much. But I'm also not sure if the rest of the circuit is up to the <1 amp demand. My plan was to use an existing placid for the cape, and run the BBB off either a battery or an external linear supply. I've got limited real estate inside my DAC enclosure. Next build I may go for a bigger box...
I'm using "LCDPS with a jumper at the CRC (instead of an R) and it can do up to 1A" as it is described there.... I2S via Raspberry Pi - HF/VHF noise - General Questions - Twisted Pear Audio Support
Russ, do you have a handle on the expected draw of the Botic yet?
I ask because I've started planning my build around this development; I'll hopefully have my new Buffalo DAC IIISE soon, have started to assemble a couple of I/V modules and I'm scoping out a chassis and power supplies.
Thanks
I ask because I've started planning my build around this development; I'll hopefully have my new Buffalo DAC IIISE soon, have started to assemble a couple of I/V modules and I'm scoping out a chassis and power supplies.
Thanks