Bob Cordell's Power amplifier book

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#8,007
Bob Cordell said:
I have finally gotten around to cleaning up the LTspice file and posting the circuit simulation file for the DH220C.

Cheers,
Bob
Click to expand...
Dear Bob,

happy new year to you and all others too!

Many thanks for providing us the updated schematic and simulation file! Would it be possible for you to post the needed (and maybe updated?) include files too?
Code: 
.include Cordell Models.txt
.include LMOSFETs Ks.txt
.include JFET models.txt
BR, Toni
 
#8,013
astx said:
Dear Bob,

happy new year to you and all others too!

Many thanks for providing us the updated schematic and simulation file! Would it be possible for you to post the needed (and maybe updated?) include files too?
Code: 
.include Cordell Models.txt
.include LMOSFETs Ks.txt
.include JFET models.txt
BR, Toni
Click to expand...

Here are the include files.

Cheers,
Bob
 

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#8,014
davada said:
Bob I can't save the file to disk from LTspice.
Win says it is write protected.
Click to expand...

I didn't know they were write protected. I tried downloading the to disk and it worked for me. I just clicked on the file, clicked on "show in folder", then copied it from the download folder to my destination folder and opened it in that folder.

Let me know if this does not work for you.

Cheers,
Bob
 
#8,015
Bob Cordell said:
I didn't know they were write protected. I tried downloading the to disk and it worked for me. I just clicked on the file, clicked on "show in folder", then copied it from the download folder to my destination folder and opened it in that folder.

Let me know if this does not work for you.

Cheers,
Bob
Click to expand...

It's okay Bob. I found a way around it.
It's just win10's overly protected system.
 
#8,016
davada said:
That's okay. sf1412 linked to it for me.

Thanks, sf1412
Click to expand...

Good, so I don't have to repeat myself. If you search the web for an OPA627 schematic there is a similar second stage and I was fooling around with making it fully complementary. I describe what is going on in the first post, all 4 Vas transistors are bootstrapped to the output so the DC errors and the effect of Cob become common mode and do not appear in the signal path. In that example I simply used am IC buffer as an output stage. The resistors are doing the same thing as in Bob's circuit, preventing the voltages from being undefined in the presence of inevitable device offsets. In the picture I think the Aol was about 1e7 with the 2K resistors.

Now to Muntz up Bob's circuit. 😀
 
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#8,017
scott wurcer said:
Good, so I don't have to repeat myself. If you search the web for an OPA627 schematic there is a similar second stage and I was fooling around with making it fully complementary. I describe what is going on in the first post, all 4 Vas transistors are bootstrapped to the output so the DC errors and the effect of Cob become common mode and do not appear in the signal path. In that example I simply used am IC buffer as an output stage. The resistors are doing the same thing as in Bob's circuit, preventing the voltages from being undefined in the presence of inevitable device offsets. In the picture I think the Aol was about 1e7 with the 2K resistors.

Now to Muntz up Bob's circuit. 😀
Click to expand...

No need to repeat. Just point.
 
#8,018
I wonder the same! I've built a few sub circuits that scott had shown and they've worked like magic and that's great learning for me even after spending almost 30 years in telecom electronics!
(thanks Scott!)

davada said:
It is beyond me why someone would continue to argue with two or more master electrical engineers who have some 40 years of experience behind them.

But it does seem that someone shows up ever few month to do so.
Click to expand...
 
#8,019
davada said:
It is beyond me why someone would continue to argue with two or more master electrical engineers who have some 40 years of experience behind them.

But it does seem that someone shows up ever few month to do so.
Click to expand...

I think it is part of the language barrier. I told him twice that 'model' and 'circuit' are two different things, but he keeps using 'model' for what looks like the complete circuit. Must be the Google translator.

Jan
 
#8,020
jan.didden said:
I think it is part of the language barrier. I told him twice that 'model' and 'circuit' are two different things, but he keeps using 'model' for what looks like the complete circuit. Must be the Google translator.

Jan
Click to expand...
Jean, thanks for the tip. We, in Russia, called the model as a line with parameters of the transistor, and schematics of the product. I find it hard to break the habit.
 
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