Bob Cordell Interview: BJT vs. MOSFET

I have a thought about RFI. Let us say that a power transistor has an effective input capacitance between the base and the emitter of .02uF, like the power transistor that Bob Cordell used as an example. Now, let us take an 'ideal' diode and put an 'ideal' .02uF cap in parallel to it. How effective an RF detector would it be? Now, what is the difference between the diode and the input to a transistor?
 
I could be wrong, but I have always considered hi RFI sensitivity in bipolar transistors to be from having a conducting input diode at the input. You know, the base emitter junction. Jfets have a junction also, but it is turned off, normally. Still, if you overwhelmed it with RF, it could conduct. I don't know what you would have to do to make a mosfet detect RF.
 
PMA said:


syn08, I am sure you have checked PCB or breadboarding, especially NFB return point (physical placement).

Did that, checked all over and then again, no good. I'm usually very careful when breadboarding with component placing, ground loops, etc...

At the first glance, the drawing that Edmondo so kindly emailed me is identical to what I entered in PSPICE and then breadboarded.

One of these days I'll take the time and rebuild (breadboard) Edmondo's design from scratch. Perhaps it was a wiring error or a bad device somewhere. Also, I usually don't care to match devices, as long as they came from the same tube. This time I'll try to check and match at least the betas.

Perhaps I'm old fashioned, but I have to admit I'm a little suspicious about circuits that can't be (at least roughly) estimated by hand calculations. Edmondo's design has so many poles and zeroes, FB loops, and high impedance nodes that probably every fraction of pF counts. It could be as well one of those circuits that are "unmanufacturable" due to a very high sensitivity to component values and parameters. Perhaps one day I'll have the time to do a sensitivity analysis in PSPICE...

Edmondo, what npn/pnp device models have you used in the simulations?

syn08
 
Did anybody read the paper on RFI that somebody (Hartono, I think) linked to earlier? I have only had a quick glance at it, but it seems to indicate much deeper issues than just detection due to the transfer function. The paper showed empirical results which seemed not to be explainable by detection, and which, according to the paper, did not show up in simulations if using the Gummel-Poon model. Emitter crowding was mentioned, I think. I am not clear about if these empirical results were some sort of secondary effects of detection or if they had nothing to do with detection at all.

Maybe somebody with very good knowledge of semiconductor theory can understand the paper better?
 
john curl said:
I could be wrong, but I have always considered hi RFI sensitivity in bipolar transistors to be from having a conducting input diode at the input. You know, the base emitter junction. Jfets have a junction also, but it is turned off, normally. Still, if you overwhelmed it with RF, it could conduct. I don't know what you would have to do to make a mosfet detect RF.


Hi John,

I agree. This is exactly the way I look at it.

Bob
 
estuart said:

Indeed, the latter has unnecessary high resistors at the inputs, which should be lowered by a factor of ten (sorry Glen) to reduce the Johnson noise. Why didn't you tell him this? Only after this has been done (lowering the resistors), one should ask whether to use BJTs or JFETs.


🙄
My 12W amp does not have unnecessarily high input resistors and I am well aware that lowering their values would lower the noise. The noise performance is more than adequate and I’d like to keep my input impedance at around 20k, not 2k.
 
estuart said:


Hi Pete,

I think you are referring to an other design of mine, not the one depicted in post # 1207, rather
http://www.diyaudio.com/forums/showthread.php?s=&threadid=94676&perpage=10&pagenumber=92 post #912.
Any how, the intent is that the followers are operating in class-AB. Using four transistors might look a waste of silicon, but it isn't, as each of them has to deliver only half of the current to the gates. So they can have half the size of drivers that would be needed in case of using only two transistors. Besides, this topology allows better control of the turn-on/turn-off delay of the MOSFETs.

Oscillation in the cascoded VAS? If you expect oscillations, please tell me more about it.

Cheers, Edmond.


Oh! Thanks for referring me to the correct schematic. I don't read every post and just drop in here from time to time so I missed the other design. OK, A/B for that design.

Don't know what the issue might be with the one that syn08 built, but I will keep an eye out for his progress.

It is simply that audio circuits are usually not built with RF wiring techniques in mind, and parasitics have a stronger influence as we improve the speed of a stage, such as with a cascode connection.

Pete B.
 
syn08 said:



On the flip side, I've noticed that Glen's design is occasionally affected by some strange latch-up effect. When the output signal exceeds about half the rail, any slight change in the input triggers some sort of low frequency oscillation (a few KHz) with the output bouncing between rails.

This was for a high voltage version (+/-50V) and I was able to control this behaviour by adding a few clamp diodes, which also helped to better control the clipping.


G'day.

That's really weird. I have no definite idea what could be wrong in the design to cause such behaviour. My 12W implementation doesn’t behave in such a manner in either simulation or real life.

My only guess it that there is some sort of strange feedback around the biasing circuitry caused by large capacitances of the plug-in-breadboard (Try grounding the junction of the two zener diodes connected in parallel with C4). It is very hard to build a high performance anything on breadboard. This still doesn’t really explain why it the effect should be as low as ~3kHz though. This leads me to suspect your power supply. Maybe there is some kind of 'motorboating' happening here.

Cheers,
Glen
 
syn08 said:


It was almost independent on the signal level, but was frequency dependent, and 0.01% was at 1KHz. At 20KHz it was almost 0.08%. Yes, I'm comparing with Glen's 12W design.

I would expect a cascoded VAS to occasionally oscillate, but not at 3KHz...

syn08


So, I take it you're saying that you looked at the distortion products and they were in fact a harmonic of the input fundamental? I agree that would most likely rule out RF oscillation in the VAS. It will be interesting to see what you find, if you continue with this design.

Pete B.
 
john curl said:
Glen, pretty interesting design. You might think about using dual jfets on the inputs to lower potential noise, but the rest looks like what we like to do.


Great minds think alike 😉

I'm using the low noise SSM2200/SSM2220 dual matched BJT pairs for the inputs, which give very adequate low noise performance in a power amp. I'm not willing to sacficice the open loop gain and linearity in this topology by using JFETs for the diff pairs.

Cheers,
Glen
 
john_ellis said:
Hi all

Sorry, I've missed quite a bit of this discussion. Backing up a little - surely gm doubling (or not) depends on the impedance which is driving the output stage.

In an ideal current source, both transistors being on cannot have gm doubling distortion. In this case "gm" is an inappropriate measurement since current is multiplied. Reason is simple: if current splits into one output half, it cannot go into the other. Thus if two stage halves in the output have a current gain of 100 and they're both on, 1 mA excursion in the VAS will split (if the impedances are matched) to 0.5 mA each and you have 50 mA out x2= 100 times = same as one half being on. If the impedances are mis-matched (say due to one side approaching cut-off) the current still divides and the output is still the total of both pieces. No "gm doubling".

On the other hand Miller-VAS's and most practical VAS configurations cannot achieve the ideal current drive. As soon as the ideal situation is not achieved, then some form of gm doubling is going to occur, because now we are dealing with some impedance rather less than infinity. But the higher the impedance can be maintained, the better is the transfer characteristic. Another reason, incidentally, why it is better to try to avoid hanging capacitors onto the VAS collector.

It is possible to build amps without capacitors on the VAS, but usually this has to work with lower overall gain. Crossover distortion is virtually absent (indicated by reducing harmonic levels) and the net distortion is in the 0.0x % rather than 0.00x% league.

cheers
John


Hi John,

You are exactly right. If you essentially drive the output transistors in current mode with a current source, gm doubling will not occur. It is a matter of philosophy as to whether one prefers the extreme of current drive as opposed to the other extreme of perfect voltage drive. Pick your poison. If you design for current drive, you are now going to be susceptible to a different set of nonlinearities, such as beta variation.

Cheers,
Bob
 
Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

Bob Cordell said:


Hi Glen,

I have a couple questions on your 500W rail-tracking Class A amplifier. It certainly looks like quite a project.

In referring to your BJT stage above, where you said earlier that its distortion makes the 0.06% open-loop output stage distortion quoted by Nelson lame, is that the output stage of the 500W amplifier?

Have you actually built and tested that output stage open-loop? What distortion value did you actually get for it at 20 kHz full-power? (500W balanced into 8 ohms, right?).

In referring to the 60/35 MHz ft Sanken power transistors in the Class-A core, are you referring to the 2SA1295 and the 2SC3264?

Have you SPICE'd the output stage? Where did you get the models for the Sanken transistors?

Thanks,
Bob


Hi Glen,

Perhaps you missed my questions here from an earlier post.

Thanks,
Bob
 
G.Kleinschmidt said:
🙄
My 12W amp does not have unnecessarily high input resistors and I am well aware that lowering their values would lower the noise. The noise performance is more than adequate and I’d like to keep my input impedance at around 20k, not 2k.

G.Kleinschmidt said:
Great minds think alike 😉

I'm using the low noise SSM2200/SSM2220 dual matched BJT pairs for the inputs, which give very adequate low noise performance in a power amp. I'm not willing to sacrifice the open loop gain and linearity in this topology by using JFETs for the diff pairs.

Cheers,
Glen

Hi Glen,

Don't take my words as offensive. It was J.C. who made the suggestion that noise could be lowered by using jfets, which is arguable in itself and even more arguable when a circuit is dominated by Johnson noise. So, only for this reason I said that the input resistors should be lowered, implying that it is a silly exercise to look for even better input devices when this has not been done in the first place.
As a matter of fact, I have defend your choice of using BJTs and I'm not saying that the noise performance of your amp is inadequate.
But, being a perfectionist, I like to point out that a lower noise figure is possible without reducing the input impedance by using a bootstrap technique. See for example:
http://www.diyaudio.com/forums/attachment.php?s=&postid=1207205&stamp=1177506482 post#1207
The input impedance 12.3kOhm, not 2kOhm as you may think. Besides, the SSM2200/SSM2220 are probably the best BJTs you can get for your application, so, they 'deserve' to be embedded in a circuit giving the lowest possible noise.

Cheers, Edmond.