Workhorse said:
Lots of caveats there, especially the last one. I just don't think they are worth the money and hassle. I don't think the steel hermetic package buys us anything in a consumer product, and in fact there are those out there who would probably complain about the presence of seel 🙂.
Sorry for not responding earlier. I have been away for a week.
The person first mentioning bootstrapping explicitly wrote that the bootstrapping reduced Cbe, not the input capacitance. I asked how bootstrapping could possibly alter the Cbe, to which you seemed to respond. Obviously you were not answering the question I asked, but took the liberty of answering a different question without telling us, which explains all the confusion you mention above. Cbe and input capacitance are very different things, even though they sometimes match approximately in value.
People make mistakes and write things they don't meant. That is life. That is excusable. However, all too often such mistakes go unnoticed by the people doing the mistakes and cause endless pointless discussions based on other peoples assumption that people mean what they write and not something else. I can't read peoples mind and I don't think anybody else on the fourm can either.
Anyway, I think Andy had already helped to clear up the confusion.
G.Kleinschmidt said:
The "source" being that delivering the drive current to the base of the BJT. What else could it have meant in relation to a BJT?
But we talking about the effective input capacitance, as seen by the "source". That depends on how the transistor is connected.
Yes, but I am mostly talking about the contribution of Cbe to the effective base to ground capacitance.
In an emitter follower it is much less than when the emitter is tied to a supply rail, as with a common emitter connected output (not driver) transistor, as used in a CFP.
The person first mentioning bootstrapping explicitly wrote that the bootstrapping reduced Cbe, not the input capacitance. I asked how bootstrapping could possibly alter the Cbe, to which you seemed to respond. Obviously you were not answering the question I asked, but took the liberty of answering a different question without telling us, which explains all the confusion you mention above. Cbe and input capacitance are very different things, even though they sometimes match approximately in value.
People make mistakes and write things they don't meant. That is life. That is excusable. However, all too often such mistakes go unnoticed by the people doing the mistakes and cause endless pointless discussions based on other peoples assumption that people mean what they write and not something else. I can't read peoples mind and I don't think anybody else on the fourm can either.
Anyway, I think Andy had already helped to clear up the confusion.
Christer said:
I was replying to this post of yours......
http://www.diyaudio.com/forums/showthread.php?postid=1209267#post1209267
....which wasn't explicitly address to anyone, but seemed to be a reply to my post preceeding it, here:
http://www.diyaudio.com/forums/showthread.php?postid=1209214#post1209214
I answered your bootstrapping question here:
http://www.diyaudio.com/forums/showthread.php?postid=1209310#post1209310
When you replied here:
http://www.diyaudio.com/forums/showthread.php?postid=1209316#post1209316
....you did not tell me that you were talking to somebody else.
I can’t read minds either.
Thanks.
Glen,
severel of your own posts that you link too confirm that you said that Cbe is bootstrapped, not the input capacitance, just as John said. How could I possibly know you meant something else? As you can see from my posts, I eventually started to suspect you might mean the input capacitance, not Cbe, which Andy confirmed to probably be the case.
I am not trying to accuse anybody of anything. I am just trying to explaing what the confucion was and where it came from. We already know now what the misunderstanding was, and that we seem not to disagree on the technical details, so I suggest we leave it at that. There is no point in throwing accusations at each other.
severel of your own posts that you link too confirm that you said that Cbe is bootstrapped, not the input capacitance, just as John said. How could I possibly know you meant something else? As you can see from my posts, I eventually started to suspect you might mean the input capacitance, not Cbe, which Andy confirmed to probably be the case.
I am not trying to accuse anybody of anything. I am just trying to explaing what the confucion was and where it came from. We already know now what the misunderstanding was, and that we seem not to disagree on the technical details, so I suggest we leave it at that. There is no point in throwing accusations at each other.
Christer said:
OK, but one last niggle - I think that Cbe (same as Cib) IS bootstrapped. In the emitter follower configuration, the emitter 'follows' the base. Cib is the capacitance between the emitter and the base, so this capacitance is bootstrapped. Because of this, the effective input capacitance is equal to:
Cin = Cob + (1-Av * Cib)
Cheers,
Glen
G.Kleinschmidt said:
Yes, I think I can see your point of view too here, although I am not so sure it is appropriate or useful to call it bootstrapped. However, that is just a matter of terminology and the important point is that regardless of whether we think of Cbe (or Cib) as bootstrapped or not, its value is unaffected by the actual topology. But we seem to agree on that.
Christer said:
Hi Guys,
Yes, it is so easy for us to get tangled up in semantics. I tend to agree with Glen in that I would say that the Cbe is bootstrapped, thus reducing its effective contribution to Cin.
So, in very rough terms, if Cbe was 1 uF (a 4 mHz bipolar operating at about 600 mA), and the gain of the follower stage was 0.99 (gm = 25 siemens against a 4 ohm load), then the Cbe contribution to effective input capacitance would be about 1 uF/100 = 10,000 pF. Then if Ccb were another 500 pF, the net effective input capacitance would be on the order of 10,500 pF.
The key thing to keep in mind is the importance of the follower stage gm against the load impedance, which determines the amount of bootstrapping. With a bipolar, since both Cbe and gm tend to be proportional to Ic, some of this goes out in the wash with current variations.
Bob
Bob Cordell said:
G'day Bob.
I think this strengthens the argument for using more BJT pairs than that necessary for the given output power in high performance designs. Beta droop and sky-rocketing input capacitance at high currents are best avoided. Doing such not only improves the linearity of the output stage, but lightens the load on the driver stage and VAS as well. A typical 16A BJT starts going down the crapper proper at Ic > ~2A.
Cheers,
Glen
G.Kleinschmidt said:
Hi Glen,
I agree completely. If you've got the money for paralleling, beta droop, ft droop and SOA all get better, not to mention spreading out the thermal burden. That is one reason why I would use two TO247 power devices over a single TO-3 device any day of the week and probably still save money.
Cheers,
Bob
OT: Hfe rank - Preferences?
Some power BJTs such as the Sankens are sorted for beta. For example: hfe codes: O(50 to 100) P(70 to 140) Y(90 to 180)
The obvious choice is to go for highest beta. Any reason to use lower? Wondering if there might be any advantages as far as thermal run away (die hot spots) is concerned or anything else with choosing a lower beta part.
Thoughts?
Pete B.
Some power BJTs such as the Sankens are sorted for beta. For example: hfe codes: O(50 to 100) P(70 to 140) Y(90 to 180)
The obvious choice is to go for highest beta. Any reason to use lower? Wondering if there might be any advantages as far as thermal run away (die hot spots) is concerned or anything else with choosing a lower beta part.
Thoughts?
Pete B.
Re: OT: Hfe rank - Preferences?
Good question.
I'd like to know too.
My first thought was 'why even bother making the low beta devices?'
But then I thought maybe they don't Maybe it's one process and they just sort by gain.
If that's the case, then I imagine the other craracteristics would be the about the same.
If I were a manufacturer, I'd rather sell the lower beta devices than just throw them away.
PB2 said:
Good question.
I'd like to know too.
My first thought was 'why even bother making the low beta devices?'
But then I thought maybe they don't Maybe it's one process and they just sort by gain.
If that's the case, then I imagine the other craracteristics would be the about the same.
If I were a manufacturer, I'd rather sell the lower beta devices than just throw them away.
Re: OT: Hfe rank - Preferences?
Beta dispersion across a bipolar transistor wafer batch is usually due to the variations of the base impurities concentration and emitter junction depth.
A higher beta means a slightly lower concentration of impurities in the base and/or a thinner metalurgical base (the difference between the base and emitter junction depths). But either would also mean that the electrical base thickness is stronger modulated by Vce. As a result, the Early voltage is lower for higher beta transistors. How much this Early voltage reduction is depends mainly on the transistor design.
PB2 said:
Beta dispersion across a bipolar transistor wafer batch is usually due to the variations of the base impurities concentration and emitter junction depth.
A higher beta means a slightly lower concentration of impurities in the base and/or a thinner metalurgical base (the difference between the base and emitter junction depths). But either would also mean that the electrical base thickness is stronger modulated by Vce. As a result, the Early voltage is lower for higher beta transistors. How much this Early voltage reduction is depends mainly on the transistor design.
Re: Re: OT: Hfe rank - Preferences?
I believe that it is usually a tradeoff, trying to maximize all of the important parameters, max Vce, beta, etc.
Often as they get better at it they sometimes stop yielding the lower grade parts.
More OT, but some might find this interesting: I know of this in the digital world where obviously clock speed is a parameter that they continue to improve. Sometimes as the process gets better (or after a die shrink) there is no yield on the slower parts, yet a customer might have orders for a million or so units that use the slower part. So they just stamp the faster part with the slower speed. This usually works, but sometimes not when min delays are important, such as for hold time.
Pete B.
myhrrhleine said:
I believe that it is usually a tradeoff, trying to maximize all of the important parameters, max Vce, beta, etc.
Often as they get better at it they sometimes stop yielding the lower grade parts.
More OT, but some might find this interesting: I know of this in the digital world where obviously clock speed is a parameter that they continue to improve. Sometimes as the process gets better (or after a die shrink) there is no yield on the slower parts, yet a customer might have orders for a million or so units that use the slower part. So they just stamp the faster part with the slower speed. This usually works, but sometimes not when min delays are important, such as for hold time.
Pete B.
Re: Re: OT: Hfe rank - Preferences?
Thank you for the interesting comments.
I was wondering more with regard to complex in circuit effects that anyone might have considered and want to share. Are there no negatives at all to higher beta parts in the output stage?
Pete B.
syn08 said:
Thank you for the interesting comments.
I was wondering more with regard to complex in circuit effects that anyone might have considered and want to share. Are there no negatives at all to higher beta parts in the output stage?
Pete B.
Re: Re: Re: OT: Hfe rank - Preferences?
Pete,
A first order (and rather crude) approximation is that the product between the current gain and the Early voltage is a constant, for a certain BJT design and manufacturing process.
On the other side, a lower Early voltage is connected to higher distortions in the OPS. Therefore, an OPS with power BJTs having large current gains would exhibit more distortion. Because the Early effect induced distortions are essentially nonlinear, the measurable effect is mostly on the IMD. The Early effect is one of the reasons why BJTs exhibit larger high order IMD when comparing to MOSFETs.
That's about all I can tell without going into math or device physics. A quantitative analysis is very difficult and largely depends on almost everything you can think of, starting with the device design, circuit topology (especially emitter degeneration, if any), bias conditions, etc... I personally consider all these as a second order effect that can be neglected, there are many other major mechanisms inducing distortions at high injection levels as in a BJT OPS. I think you are safe (in terms of measurable distortion performance) with the high gain BJTs.
For more details, there are quite a few articles on this topic in the IEEE library and quite a few US patents regarding ways to compensate the Early effect, however I'm not sure if any applies to a BJT OPS. They seem mostly to deal with the opamp implications.
PB2 said:
Pete,
A first order (and rather crude) approximation is that the product between the current gain and the Early voltage is a constant, for a certain BJT design and manufacturing process.
On the other side, a lower Early voltage is connected to higher distortions in the OPS. Therefore, an OPS with power BJTs having large current gains would exhibit more distortion. Because the Early effect induced distortions are essentially nonlinear, the measurable effect is mostly on the IMD. The Early effect is one of the reasons why BJTs exhibit larger high order IMD when comparing to MOSFETs.
That's about all I can tell without going into math or device physics. A quantitative analysis is very difficult and largely depends on almost everything you can think of, starting with the device design, circuit topology (especially emitter degeneration, if any), bias conditions, etc... I personally consider all these as a second order effect that can be neglected, there are many other major mechanisms inducing distortions at high injection levels as in a BJT OPS. I think you are safe (in terms of measurable distortion performance) with the high gain BJTs.
For more details, there are quite a few articles on this topic in the IEEE library and quite a few US patents regarding ways to compensate the Early effect, however I'm not sure if any applies to a BJT OPS. They seem mostly to deal with the opamp implications.
Bob Cordell said:
Hi Bob
I’m continuing this discussion on output impedance from the closed down “audibility of output coils” thread here, since it is relevant to this thread.
I think 0.5uH is still a significant proportion of the total effective inductance, in the case that a small output coil is used to isolate a capacitive load.
Now how would that figure look if low transconductance Lateral MOSFET’s were used? Or if the bias current was lower (say 100mA) or if the MOSFET’s were driven directly from the VAS, as in probably 90% of MOSFET amplifiers ever made?
Cheers,
Glen