andy_c said:
Yes it is what I mean. I saw your graphs and it is great. The Cordell correction is impressive but the optimal BJT looks great to .
If you can run this for your three resistors and IoRc = 26 and if it is not to much the same for IoRc = 52 with the same 3 resistors.
I want to compare with Oliver's graph and see it from another perspective.
JPV
Glad you are back, Nelson. I, too, tried the LT1166 (I think that was the biasing chip, wasn't it?) about 10 years ago when it first came out. At first it worked OK, BUT we had real problems making a good high frequency distortion spec with the chip, and we had to drop it. I called LT, but they could not help.
x-pro said:
Hi Alex,
Some of the members here feel it very hard to digest that N-Channel Mosfet or Quasi-Complementary Designs are not as good as Complementary........
Your Circuit uses Logic Level FETs in quasi-Complementary fashion, which decreases the rail loss as well and also its just a Three device simple topology, very good indeed.....
We designed near Rail [within 2 volts max]swing N-Channel Industrial Vertical Mosfet amps with Distortion much lower than other complementary designs in high frequency domain.....
Have a look at this topology....All the bipolars are small signal devices 2N5551/5401.....
regards,
K a n w a r
Bob Cordell said:
In BJT quasi complementary amps the the high side device [EF]emitter current Vs low side device [CE]collector current has a huge difference in balancing the Push / Pull operation....
BJT quasi amps are not as superior as BJT complementary amps
While in N-Channel Mosfet amp...Idrain is exactly equal to Isource......thats the major difference in high power operation....and which tends to maintain the push pull operation much linear, even more than comp. mosfet amps using p-Channel and n- Channel devices.....
A P-Channel cannot match its [the] N-channel complement device in any aspect,
There is huge difference in RDS, Idrain, Vds, Vgs-threshold, power dissipation, gate capacitance, Gate Charge between a N-channel and its p- channel complement, even if you substitute another complement with more matching criteria than also the difference remains....
whereas a N-channel matches to another N-channel perfectly well......
K a n w a r
Workhorse said:
My circuit is not really a quasi-complementary, as there is no obvious "upper" and "lower" half, and the P-channel phase splitter is active for both output devices. Good symmetry is achieved by a current sharing. The amount of NFB around both output devices is exactly the same. It is a very symmetrical follower in regard to the output impedance, slew rate and current limits on both halfs.
Thank you - I have seen it before in one of your posts here. There are several options you can take with N-channel only output. I like (obviously
) mine as it is very simple and has several very attractive qualities for an audio amplifier. For example: a bit earlier in this thread there was a discussion on the protection of the output and one of the difficulties for MOSFETS was stated as very high currents available in case of a shorted output. In my circuit the maximum output current is limited by 2Vth*S in all conditions which provides for a good available current (20-30 A peak from devices like HUF76639) and this current limit has a negative Tc as S drops with temperature. Because of this precise current limit it is possible to use very simple and efficient means of protection from a shorted output - by adding only two resistors to the circuit. A production output stage can happily survive a shorted output for long enough to blow a "T" fuse in the secondary of the mains transformer, so a simple relay protection is easy to implement.
Cheers
Alex
Some insights of your designs
Even If you use a P-channel Driver phase Splitter that doesnot mean its not a Q-C-amp, then also your output stage uses same polarity devices, which means your amp is a real Quasi-Complimentary amp by the definition itself....
I think you haven't seen the circuit which I have posted first time on this forum in this thread,..You can very well see 2 local feedback loops one for each polarity of devices which linearizes the output response in terms of Slewrate, output Impedance, gain symmetry as well.....And its Slewrate easily touches 135V/uS for +-60V rails
I bet your circuit suffers from massive Cross-Conduction at high frequency...try to run it at 30-40KHZ full clipped and no load attached....See yourself how it goes into flames...because i have seen these Creeks smoking off with HF Cross-Conductions....
If you Run our amp at 100KHZ in same way only thing changes is its idle current which rises from 35mA per device to 150mA.....
Short-Circuit handling in Mosfet isnot a difficult task, but it requires somewhat more precise control over certain parameters to sense and implement appropriate operation....You use relay for protection which is an inferior way because when the relay switches incase of shorted output the contacts arc and get damaged also, while we prefer to mute the amp operation by muting the audio signal and turning off the drive in order to eliminate any damage which is far superior appraoch.....
Your amp uses Logic Level Fets which aren't available in High power versions if one is set to make a high power amplifier out of them...We implement standard vertical n-channel industrial mosfets with much greater flexibility and quite an excellent performance......maximum p-channel device Vds availability is 250V , while N-channel is available as high as 600V very easily....
K a n w a r
x-pro said:
My circuit is not really a quasi-complementary,
Thank you - I have seen it before in one of your posts here. There are several options you can take with N-channel only output. I like (obviously
so a simple relay protection is easy to implement.
Cheers
Alex
Even If you use a P-channel Driver phase Splitter that doesnot mean its not a Q-C-amp, then also your output stage uses same polarity devices, which means your amp is a real Quasi-Complimentary amp by the definition itself....
I think you haven't seen the circuit which I have posted first time on this forum in this thread,..You can very well see 2 local feedback loops one for each polarity of devices which linearizes the output response in terms of Slewrate, output Impedance, gain symmetry as well.....And its Slewrate easily touches 135V/uS for +-60V rails
I bet your circuit suffers from massive Cross-Conduction at high frequency...try to run it at 30-40KHZ full clipped and no load attached....See yourself how it goes into flames...because i have seen these Creeks smoking off with HF Cross-Conductions....
If you Run our amp at 100KHZ in same way only thing changes is its idle current which rises from 35mA per device to 150mA.....
Short-Circuit handling in Mosfet isnot a difficult task, but it requires somewhat more precise control over certain parameters to sense and implement appropriate operation....You use relay for protection which is an inferior way because when the relay switches incase of shorted output the contacts arc and get damaged also, while we prefer to mute the amp operation by muting the audio signal and turning off the drive in order to eliminate any damage which is far superior appraoch.....
Your amp uses Logic Level Fets which aren't available in High power versions if one is set to make a high power amplifier out of them...We implement standard vertical n-channel industrial mosfets with much greater flexibility and quite an excellent performance......maximum p-channel device Vds availability is 250V , while N-channel is available as high as 600V very easily....
K a n w a r
Re: Some insights of your designs
Kanwar,
I think this is becoming offtopic here, so I've opened a new thread:
http://www.diyaudio.com/forums/showthread.php?s=&threadid=94030
and answered your post there.
Cheers
Alex
Workhorse said:
Kanwar,
I think this is becoming offtopic here, so I've opened a new thread:
http://www.diyaudio.com/forums/showthread.php?s=&threadid=94030
and answered your post there.
Cheers
Alex
Andy, this graph is interesting, but it confuses things. First, 26mV is on the high side for setting the bias. It would be better to use 15 mV or so.
Second, you are operating at a different bias current with each emitter resistor value. Therefore, you are operating more class A with the lower value resistors. This is always an advantage with a given speaker load. Actually, all the resistor values are essentially 'equal' in optimization, with this example.
Second, you are operating at a different bias current with each emitter resistor value. Therefore, you are operating more class A with the lower value resistors. This is always an advantage with a given speaker load. Actually, all the resistor values are essentially 'equal' in optimization, with this example.
john curl said:
Yes, I was a bit confused myself
. JPV had asked me to plot them this way, with 26 mV because he wanted to compare with some data in Oliver's paper (the HP guy). Yes, 26 mV is overbiased. He also wanted me to do it with 52 mV, but that is waaaay overbiased. Since the overbias is causing some concern, I think I'll just leave well enough alone. My previous post here used the bias current specified by Self as optimum for 0.22 Ohm emitter resistor (107 mA, blue trace). This looks pretty close to optimum from the graphs also.Yes. Just for reference, here's a table from the book by the guy you probably love to hate
.Edit: Actually, this is making me wonder whether he meant 26 and 52 mV between emitters. Hmmm.
Actually, the table is very good.
Let me put some more info into this equation:
First, there is NO exact value for the resistor, but you will most probably have the best success with a 0 signal voltage drop of 15-26mV. This is the BEST FIT REGION for the transfer function.
However, you must drive the output transistors from a zero ohm source, to ideally match the equations. Since that is not practical, then Beta non-linearity and Rs/beta will also be part of the overall optimization of the transfer function.
For example, if you current drive the output transistors, then all bets are off. (equations too!)
Let me put some more info into this equation:
First, there is NO exact value for the resistor, but you will most probably have the best success with a 0 signal voltage drop of 15-26mV. This is the BEST FIT REGION for the transfer function.
However, you must drive the output transistors from a zero ohm source, to ideally match the equations. Since that is not practical, then Beta non-linearity and Rs/beta will also be part of the overall optimization of the transfer function.
For example, if you current drive the output transistors, then all bets are off. (equations too!)
andy_c said:
Yes, I was a bit confused myself
Yes. Just for reference, here's a table from the book by the guy you probably love to hate
Edit: Actually, this is making me wonder whether he meant 26 and 52 mV between emitters. Hmmm.
Thank you andy_c; it is coherent with Oliver's curves.
Let me explain why I asked this run
Olivers paper is giving a normalized graph called 'effect of emitter resistance on crossover distortion'. This graph obtained by successive approximation is the normalized difference between the output resistance ( function of current) and the final value of this output resistance for large currents and this for differents values of a parameter: go x R, where go is the transconductance at bias current Io and R=~Rc the resistance in the emitter leg if driven from a voltage source.
In fact he did exactly what you have done: a sweep of current in one leg, calculation of the output voltage and total output current. By taking the derivative of de/di you have the output resistance function of i.
For Oliver the optimal parameter ( for minimum crossover distortion) is goRc somewhere between 0.5 and 1 because there is no dip in Rout and the variation of Rout is minimum I suppose. He is not saying why but he suggest goRc =0.75 which is equivalent to Rc Io = 20mV.
The graph I asked is for goxRc =1 which is equivalent to IoRc=26mv. This is a limit curve of the optimal zone in his graph.
. You can see on your curves that all three give the same relative maximum deviation of 30% of Rc These curves are the only one where Rout at zero current = Rout at high current but has a bump at I = 4 x Io which is correct on your curves ( great!).
A lower value of IoRc would give a monotonic rise of Rout with decreasing current and no bump which from a distortion point of view is perhaps better ( to be tested ?).
Then for an optimal IoRc what is the best combination of Io and Rc
First Rc may not be to high because we loose voltage for a specific load
But if we have low Io ( so high Rc) then the zone of relative variation of Ro is narrower ( compare the red and the blue) . Is this not better for distortion??
By using many transistors in // all with optimal IoRc= 20mv
if we take low Io for each we will have a narrow zone but the // of all the transistors will make total Rc low: the best of both worlds. What do you think?
I agree Mr Curl that it has to be driven by a low source ( Locanthi T
) to make sense. The base resistance is normally low but can influence if beta vary to much. The NJL3281 and 1302 are showing a stable 100Andy-c
The reason for my request was to see the three curves that collapse in one curve on Oliver's graph. Therefore no good idea of this current window . You can see on your red curve that the relative variation of Rout with current is in a narrower window of current than the blue one.
Is this important for distortion ??
Thanks again
JPV
The reason for my request was to see the three curves that collapse in one curve on Oliver's graph. Therefore no good idea of this current window . You can see on your red curve that the relative variation of Rout with current is in a narrower window of current than the blue one.
Is this important for distortion ??
Thanks again
JPV
JPV said:
Wow. It's clear to me that you've spent a lot of time and effort understanding Oliver's paper. I just skimmed over it and didn't attempt to understand it thoroughly. My hat's off to you!
My guess is that having the errors concentrated more near zero current would mean that for a sine wave input, the errors from an ideal sine wave would be clustered closer together in time - possibly giving more high-order harmonics?
Well, I like the FETs with error correction
Hi Andy,
Nice work as usual. I was wondering if you looked at how the EC alters the input impedance of the output stage? The impedance seen from the output of Q4 and Q8 is what I had in mind.
Pete B.
I vote for FETs, as there doesn't seem to be a solution to the cross conduction problem with bipolar transistors.
Nice work as usual. I was wondering if you looked at how the EC alters the input impedance of the output stage? The impedance seen from the output of Q4 and Q8 is what I had in mind.
Pete B.
I vote for FETs, as there doesn't seem to be a solution to the cross conduction problem with bipolar transistors.