hcpower, I see you have the sensors on the heatsink with the outputs but the drivers are on separate heatsinks .. like the Aragon
If you have an Aragon, you can do a test as follows.
If you have an Aragon, you can do a test as follows.
- Set & measure the bias current.
- Check it over a period of at least 10min to see it is stable.
- Now run the amp into a dummy load at 1/3 rated power for 10min. This will get the Heatsink stinking hot.
- Immediately check the bias with everything hot and monitor it while it cools down
- If it stays within a 2:1 range in all this without more twiddling, you have a good bias system and this is worth copying ... including the layout and mounting of drivers, outputs, sensors etc.
- Now you only have to ensure your circuit still gives good performance when the bias current varies over a 2:1 range. 😀
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I second this. And in my experience, I'd suggest Cordell first, then Self. Self assumes you already have a background in several areas, whereas Cordell doesn't.
@kgrlee
A while back I developed a 100W amp with 3x output devices in parallel and triple (pre-driver-driver-output) per half.
The bias current was less stable than desired with the usual NPN+2 resistors (three including a pot).
I considered that I needed to match 6 VBe's more accurately. From that the idea of setting the ratio first then altering Vbe came about. The PNP was the addition to allow a fraction of the VAS current to be shunted, bypassing the sense transistor.
Typically the sense transistor runs at around 100uA and is mounted on the heatsink which has to include all driver+output transistors.
The PNP conducts the bulk of the current. I typically use quite high VAS currents. The PNP is not on the heatsink, mounted on the PCB. The bias resistors are typically 10k:3k for a dual EF output stage or 15k:3k for a triple. If the PNP dissipation gets high it is worth putting a heat clip or small heatsink on it to keep it cool as there are indeed second order effects if its Vbe shifts too much.
As I mentioned the ratio can be changed to actually give a negative TC if the multiplier ratio is more than the number of Vbe's needed to compensate.
But overall, the exact match depends on the proportion of heating in the output:driver😛redriver transistors. I suspect that as the output device temperature is not tracked as closely as it might (because of thermal resistances between the junction and heatsink due to insulators etc) this is compensated for by the heatsink temperature rise warming up the driver/predriver transistors which dissipate proportionally less heat.
I have had one board which needed about 1mA in the bias regulator, and as devices vary a lot in Vbe it may need a large resistance range to adjust, hence my original suggestion of 10k pot with 220 ohm limiting resistor in the PNP base shunt resistor.
I also tend to use 0.33 ohm emitter resistors in the output rather than a more common 0.2 even if that is theoretically a better match to the gm.
A while back I developed a 100W amp with 3x output devices in parallel and triple (pre-driver-driver-output) per half.
The bias current was less stable than desired with the usual NPN+2 resistors (three including a pot).
I considered that I needed to match 6 VBe's more accurately. From that the idea of setting the ratio first then altering Vbe came about. The PNP was the addition to allow a fraction of the VAS current to be shunted, bypassing the sense transistor.
Typically the sense transistor runs at around 100uA and is mounted on the heatsink which has to include all driver+output transistors.
The PNP conducts the bulk of the current. I typically use quite high VAS currents. The PNP is not on the heatsink, mounted on the PCB. The bias resistors are typically 10k:3k for a dual EF output stage or 15k:3k for a triple. If the PNP dissipation gets high it is worth putting a heat clip or small heatsink on it to keep it cool as there are indeed second order effects if its Vbe shifts too much.
As I mentioned the ratio can be changed to actually give a negative TC if the multiplier ratio is more than the number of Vbe's needed to compensate.
But overall, the exact match depends on the proportion of heating in the output:driver😛redriver transistors. I suspect that as the output device temperature is not tracked as closely as it might (because of thermal resistances between the junction and heatsink due to insulators etc) this is compensated for by the heatsink temperature rise warming up the driver/predriver transistors which dissipate proportionally less heat.
I have had one board which needed about 1mA in the bias regulator, and as devices vary a lot in Vbe it may need a large resistance range to adjust, hence my original suggestion of 10k pot with 220 ohm limiting resistor in the PNP base shunt resistor.
I also tend to use 0.33 ohm emitter resistors in the output rather than a more common 0.2 even if that is theoretically a better match to the gm.
I wrote about this a few yrs ago here
Some Ideas on Temperature Compensation for Audio Amplifier EF Triples
Some Ideas on Temperature Compensation for Audio Amplifier EF Triples
Looks like you and I use similar circuit values! I also use 0.33 emitter degen resistors and similar bias network values.
For the two point Iq comp I discussed, on the e-Amp I used a a conventional 2 transistor bias spreader and then added an NTC + 2 resistor network to trim the high temp end to the correct Iq - so in effect the standard spreader did the first order compensation, and the NTC network fine tuned it.
I always assumed the Oliver voltage had to be very precise at 26mV, but many amps and many tests later, it turns out its more like a bath tub. You can get ultra low distortion from about 13mV up to 30mV. On a big amp with multiple output pairs, running at 26mV per degen resistor can mean high standing dissipation, so its something to consider.
For the two point Iq comp I discussed, on the e-Amp I used a a conventional 2 transistor bias spreader and then added an NTC + 2 resistor network to trim the high temp end to the correct Iq - so in effect the standard spreader did the first order compensation, and the NTC network fine tuned it.
I always assumed the Oliver voltage had to be very precise at 26mV, but many amps and many tests later, it turns out its more like a bath tub. You can get ultra low distortion from about 13mV up to 30mV. On a big amp with multiple output pairs, running at 26mV per degen resistor can mean high standing dissipation, so its something to consider.
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To much slang for English understanding, but I think I get you thoughts. If the 26mV is referring to emitter, then yes I agree😉
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Thanks for this john_ellis. If I may ask for a few more detais ...
Were the pre-drivers mounted on the heatsink?
Can you remember what sort of timescale before the bias current stablilized?
What Self & Cordell don't point out is that the thermal lags/delay/gain is different for the output stage/heatsink heating up and when it cools down.
This happens in many (all?) Golden Pinnae amps with complemenatry O/P stages.
The test I describe in #41 will show very small bias immediately after heating up and lasting for a minute or more. If you measure 1W THD in that period, it may be more than 1% .. all nasty xover. 😱
No wonder Golden Pinnae amps sound different. 😀
Hi kgrlee
The pre-drivers are on the heatsink. I thought this was clear from my previous description. All 11 transistors were actually mounted on a 6mm aluminium angle attatched to a 0.4K/W heatsink.
They have to be on the same, I suggest, to keep the tracking more or less on average correct.
If predrivers (or drivers) are on separate heatsinks the junction temperatures are going to be all over the place with respect to each other, due the power dissipation and thermal resistance differences in other words.
It's particularly important for the drivers as the dissipation depends on the gain of the output transistors.
It's important for the pre-drivers because although they normally dissipate little, they are also dependent on the gains of the following two stages. And, attaching them to the main heatsink significantly reduces short term variations.
If your pre-drivers were not on the heatsink I think you would have had some difficulties in keeping the bias current under control. Even small power levels in uncooled transistors can raise the junction temperature quite significantly, which may be insigificant in other positions in the circuit.
I don't recall the numbers now but stabilisation times were long (10min+). The thermal mass of the heatsink is rather large.
However, the change in bias current was little, but I don't have the figures to hand.
And yes, the testing I did included running at 100W for several minutes then checking the bias current. I don't recall it changing much, again.
If I have a chance I'll measure the currents in the next day or two.
The pre-drivers are on the heatsink. I thought this was clear from my previous description. All 11 transistors were actually mounted on a 6mm aluminium angle attatched to a 0.4K/W heatsink.
They have to be on the same, I suggest, to keep the tracking more or less on average correct.
If predrivers (or drivers) are on separate heatsinks the junction temperatures are going to be all over the place with respect to each other, due the power dissipation and thermal resistance differences in other words.
It's particularly important for the drivers as the dissipation depends on the gain of the output transistors.
It's important for the pre-drivers because although they normally dissipate little, they are also dependent on the gains of the following two stages. And, attaching them to the main heatsink significantly reduces short term variations.
If your pre-drivers were not on the heatsink I think you would have had some difficulties in keeping the bias current under control. Even small power levels in uncooled transistors can raise the junction temperature quite significantly, which may be insigificant in other positions in the circuit.
I don't recall the numbers now but stabilisation times were long (10min+). The thermal mass of the heatsink is rather large.
However, the change in bias current was little, but I don't have the figures to hand.
And yes, the testing I did included running at 100W for several minutes then checking the bias current. I don't recall it changing much, again.
If I have a chance I'll measure the currents in the next day or two.
Very informative post, thanks 👍👍 suddenly my layout seams wrong with positioning of the drivers... I'll dig into it and see what can be done to establish contact to the main heatsink
On my amps, the pre-drivers, drivers and outputs always share the same heatsink so are to a first order, iso-thermal.
Separating these will require more complex bias comp designs and more time in design optimizing them since the die tempts are likely to be very different and the thermal response of each stage different as well.
Separating these will require more complex bias comp designs and more time in design optimizing them since the die tempts are likely to be very different and the thermal response of each stage different as well.
One question: Aragon (by Mondial) made several amps with separate heatsink for the drivers.... Is a main heatsink really that important in real life? Not to neglected, but DIY'ers tempts to be very specific even into very small details 🙂
One important qualifier:
We have been discussing EF output stages... Using a single heatsink is for EF output stages (and its derivatives)
For CFP output stages, the drivers should not be on the same heatsink as the output devices and the bias generator device should be thermally coupled to the drivers, not the output devices.
We have been discussing EF output stages... Using a single heatsink is for EF output stages (and its derivatives)
For CFP output stages, the drivers should not be on the same heatsink as the output devices and the bias generator device should be thermally coupled to the drivers, not the output devices.
EF. Most designs these days are EF or variants of it.
I only mention the CFP version so that it can be kept in mind when assessing other designs. I hope it's not creating confusion
I only mention the CFP version so that it can be kept in mind when assessing other designs. I hope it's not creating confusion
EF= line-up of NPN-NPN (NPN) top half PNP-PNP (PNP) bottom
CFP=NPN driver-PNP output top; PNP-NPN bottom.
This option "disconnects" the base-emitter junctions of the output devices from the bias regulator path, so the drivers and bias regulator are mounted on their own heatsink and can be separate from the output device heatsink, though I 'm not sure why they should not all be on the same either, as an option. It's just that it is not as essential.
Though if they were to be all on the same heatsink, I'd make sure that the overall thermal resistance is lower than the driver and bias one would have been, scaled for the related power dissipation.
CFP=NPN driver-PNP output top; PNP-NPN bottom.
This option "disconnects" the base-emitter junctions of the output devices from the bias regulator path, so the drivers and bias regulator are mounted on their own heatsink and can be separate from the output device heatsink, though I 'm not sure why they should not all be on the same either, as an option. It's just that it is not as essential.
Though if they were to be all on the same heatsink, I'd make sure that the overall thermal resistance is lower than the driver and bias one would have been, scaled for the related power dissipation.
Makes sense, but... Any CFP-schematic that I should search for to get a view?? I've googled both EF and CPF (amplifier construction) for more knowledge, but without results in this matter..
Edit: sorry... Searched again, and CFP gave hits I could use: "compound feedback pair" 🙂
Edit: sorry... Searched again, and CFP gave hits I could use: "compound feedback pair" 🙂
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Paul Kemble's web site. PE Gemini was a prime example in the early 70's.
Would need a different (modern) transistor lineup now, but could be done.
Would need a different (modern) transistor lineup now, but could be done.