Thank you for clarifying your goal. DIY is awesome for being able to apply time where it matters to you. I consider my complementary design as complete. It has a stage 1 driver and a stage 2 power follower. If you ever want to try a PCB pair, just let me know.Woofertester -
Running the jfets at different drain currents means the would each have a different transconductance, probably with bad effects on the distortion profile. So, I prefer to make he effort and match all the jfets. Current THD for the amp as designed is about 0.2%, predominantly second harmonic.
@BeardyWan The series version is where I will be spending some effort now. I am going to try the cascode series B1 using a proto board. Once satisfied, I will make a massively parallel version. I have some JFETs that I think will be good for the gain device. I will use J111/J113 for the cascode and current source devices. Also working on a Vpinch setup.
The following post(s) are to bring everyone up to speed on the status of this effort.
I have two versions of mini JFET Beast
1. Fully complementary N/P
80 cells, Stage-1: 8 parallel cells for use as a driver, Stage 2: 72 parallel cells for use as a power amp
I consider this design fully baked. I have not built it but I did build the previous version lacking the stage 1 driver.
I have 10 PCBs and I would send a pair to interested builders at my cost plus shipping. PM to me if you are interested.
I will post the schematic in a following post.
2. Series version B1 style that is cascode. I am tinkering with the circuit and trying out J111 and J113 for both the current source and cascode position. The third JFET is the acutal buffer. I have a pile of the JFET that I like for the buffer. I will post the schematic after posting the parallel version. At the moment I am breadboarding the circuit and taking measurements
I have two versions of mini JFET Beast
1. Fully complementary N/P
80 cells, Stage-1: 8 parallel cells for use as a driver, Stage 2: 72 parallel cells for use as a power amp
I consider this design fully baked. I have not built it but I did build the previous version lacking the stage 1 driver.
I have 10 PCBs and I would send a pair to interested builders at my cost plus shipping. PM to me if you are interested.
I will post the schematic in a following post.
2. Series version B1 style that is cascode. I am tinkering with the circuit and trying out J111 and J113 for both the current source and cascode position. The third JFET is the acutal buffer. I have a pile of the JFET that I like for the buffer. I will post the schematic after posting the parallel version. At the moment I am breadboarding the circuit and taking measurements
The complementary PCB has two stages. Stage 1 is the preamp. The preamp is easy to drive and it can drive the power amp section. The power amp section is too difficult to drive by a "normal" preamp. Stage 1 is up to 8 parallel buffers. The power amp section is up to 72 parallel buffers.
This is the full complementary PCB. The top row is the preamp section whose output is labeled "Intermediate Output". The power amp section is the bottom 9 rows. The input to the power amp section is the "Intermediate output" point. Zoom in and you can see the label "Intermediate Output". There are sockets for both DGS and GDS pinouts.
Rails of +/- 15v should get you 5 to 10 watts output depending on total bias current and speaker load. Every build is going to be a little different depending what JFETs are slelected, what resistors you choose, and what voltage rails you select.
Here is the basic cell for the mini beast B1 cascode. I am currently breadboarding this circuit to investigate.
The trim pot is to allow adjusting individual cells as desired. I am planning 10mA bias current per cell and am using 10mA for breadbaording.
The J111/J113 has absolute maximums of 625mW and 35 V Vds. If you want to go crazy, you could have + / - 30v rails and run the each cell at 10mA for 300mW per cell. If I make a 72-cell PCB, it would be 720 mA bias. That would be 43 watts at idle for the power amp section per PCB.
For + / - 15v rails, you could run 20 mA per cell yielding 1.4A at idle per power amp pcb.
The gain transistor I am using has a Yfs/gm of around 40mS (measured) yielding ~25 ohms output impedance per cell. For 72 cells that would yield an amplifier output impedance of ~0.35 ohms.
For + / - 15v rails, you could run 20 mA per cell yielding 1.4A at idle per power amp pcb.
The gain transistor I am using has a Yfs/gm of around 40mS (measured) yielding ~25 ohms output impedance per cell. For 72 cells that would yield an amplifier output impedance of ~0.35 ohms.
There is likely a misunderstanding about my layout.
In Mr. Pass's mini beast, his layout has a through-hole footprint of G-G-S-D that allows any JFET to go into this footprint regardless of where the gate is located on the device. He had a custom footprint created.
In my layouts, I am using the stock JFET footprints of which there are two: D-G-S and G-D-S.
My cell has 4 footprints for two devices so that D-G-S or G-D-S devices can be used for the N device or the P device.
When completely soldered up, only half of the footprints will be used.
In the attached close-up, I have used a J175 and a J113.
The footprints are labeled for N and P as well as where the gate is located.
All of the cells are in parallel. You can populate 1/2 of one or more cells to balance the current draw from N and P portions.
In Mr. Pass's mini beast, his layout has a through-hole footprint of G-G-S-D that allows any JFET to go into this footprint regardless of where the gate is located on the device. He had a custom footprint created.
In my layouts, I am using the stock JFET footprints of which there are two: D-G-S and G-D-S.
My cell has 4 footprints for two devices so that D-G-S or G-D-S devices can be used for the N device or the P device.
When completely soldered up, only half of the footprints will be used.
In the attached close-up, I have used a J175 and a J113.
The footprints are labeled for N and P as well as where the gate is located.
All of the cells are in parallel. You can populate 1/2 of one or more cells to balance the current draw from N and P portions.
This is the complementary PCB mostly populated. I stopped populating cells when I reached the total current draw goal. The final cell is 1/2 populated to even out current draw between N and P devices. No device matching was performed.
I am putting cart before the horse here, but musing about dimensions of a low power desktop amp. What is the board footprint that you are working with?
cheers
cheers
The complementary PCB, which I consider fully baked, is :
170 mm wide ( 6 11/16")
270 mm tall ( 10 5/8")
170 mm wide ( 6 11/16")
270 mm tall ( 10 5/8")
To clarify what I built, the J175 is the P channel and J113 is the N channel. The J113 JFets have a 33 ohm source resistor installed. The J175 JFETs have a 47 ohm source resistor installed. The J175 requires a bit more throttling than the J113.
If you zoom in, you can see the 33 ohm and 47 ohm resistors.
If you zoom in, you can see the 33 ohm and 47 ohm resistors.
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