what about balanced working ?
I'm not sure that I had read every single post in this thread but I get the impression that balanced working has not been mentioned.
In light of some of the discussions going about the pros & cons of SE asymetry V fully symetrical I find this rather suprising as with this topology it's possible to have SE operation and symetrical operation in the same design
I don't have enough experience to make definitive statements about how these balance working s/e amps sound compared with other types but theoretically there are some advantages.
common mode distortion, & PSU noise cancelation, cleaner earths, possibility for lower voltage rails & therefore higher quiesent currents for faster ccts.
I have read that ( well designed ) balanced amps can tend to have an easier sound and somewhat fuller bass.
You may have guessed by now my own amps have a bal wkg SE topology. They are also class A.
I'm sure there is still room for improvment which I intend to explore but for now, to my ears, the sound is very detailed and fast, yet also very pleasing and easy on the ears...
what do we think about balanced working as a concept ?
mike
I'm not sure that I had read every single post in this thread but I get the impression that balanced working has not been mentioned.
In light of some of the discussions going about the pros & cons of SE asymetry V fully symetrical I find this rather suprising as with this topology it's possible to have SE operation and symetrical operation in the same design
I don't have enough experience to make definitive statements about how these balance working s/e amps sound compared with other types but theoretically there are some advantages.
common mode distortion, & PSU noise cancelation, cleaner earths, possibility for lower voltage rails & therefore higher quiesent currents for faster ccts.
I have read that ( well designed ) balanced amps can tend to have an easier sound and somewhat fuller bass.
You may have guessed by now my own amps have a bal wkg SE topology. They are also class A.
I'm sure there is still room for improvment which I intend to explore but for now, to my ears, the sound is very detailed and fast, yet also very pleasing and easy on the ears...
what do we think about balanced working as a concept ?
mike
capslock said:
[ re post # 149 & 150 ]
Gee, it sort of made sense to me around 1 am …
In the fft window SwCad claims that the fft is normalized to the waveform rms value (I assume they look for V(in) as the ref); it appears they simply multiply the peak value by 0.707 like a cheap voltmeter
I like to use a 2 tone IMD test signal to get more information in one plot, I added together 2KHz and 20KHz sinewaves with a 4:1 amplitude ratio for the input signal. To have the SwCad fft plot in dBV after their normalization, I adjusted the composite input peak amplitude to 1.414 V. This gives input 2KHz peak amplitude of 1.06 V = -2.5 dBVrms, 20KHz => -12 dBVrms { -17.5 dB was simply wrong in my 1st post }.
Then I assume Q2 ib flowing in the 450 Ohm resistance at the R6/7 feedback node isn’t a large distortion component (not necessarily true with higher feedback Z and FET input op amps). This means that the [V(neg_in) – V(in)] voltage is the input referred error voltage of the feedback circuit.
The distortion components in this error voltage are in dBV because of my input amplitude hack, they may be viewed as distortion of an IMD composite wave form, or you might assume there is sufficiently low distortion that they behave as linear signal components and that 4, 6, 8 KHz components are approximately the harmonic distortion of the 2KHz component of the test signal viewed alone, which is -2.5 dBVrms at the input.
To be fair you should subtract the -2.5 dB 2 KHz reference level from the 2 KHz distortion component amplitudes of –150 dB (= my latest mods 4 and 6 KHz error voltage fft peaks) to get (only) –147 dB 2nd and 3rd distortion of the 2 KHz signal (remembering that 2KHz output amplitude is 10.6 V peak, delivering 3.5 W into the 16 Ohm load, distortion is commonly reported at 1W into rated load – making these distortion # fairly conservative.)
Similarly, 20KHz input amplitude of –12 dBVrms should be subtracted from the –176 dB @40KHz, -158 dB @60KHz levels to get –164, -146 dB 2nd and 3rd harmonic distortion (trimming input cascode bootstrap voltage really did in high frequency 2nd order distortion.)
I consider the circuit to be just a sketch that illustrates high loop gain techniques, the bias is entirely accidental (~100mA output Q7/8, 18mA Q5/6) and impractical, you might be able to match discrete Qs closely enough to begin to work (with enough patience and a Big bag of 2N3904s)
sajti might consider that the AC power in Q1,2 is only 10 uWpp @40KHz + 2 uWpp @ 4KHz, with a good RC thermal model this could probably be coupled into the analysis
Eric,
let's see with numbers:
I use BC546/556 LTPs on the input. The PSU+/-40V, Ice=2mA each.
My VAS use 120ohm degeneration resistor, and Ice=8mA. With this data, the the LTP-s use 820ohm resistors to drive the VAS (about 1.6V).
I use another 9.18k series resistor for every BCs to get +/-20V for the collectors. The LTPs have emitter degeneration resistors 220ohms each. With this resistors the LTP has 2 different gain. One for the BC's collector which is 10koms/440ohms, about 23, and another for the ouput 820ohms/440ohms about 2. The second is the valid.
I agree with You, if I reduce the Vce, and the change of Ice, I will reduce the change of the dissipation.
But my solution use the distortion cancellation for the input stage. All BCs have same dissipation changes during the driving, and -due the symmetrical topolgy- this distortions cancel each other.
Of course there is another solution to use this idea with cascode connected devices. Mark Levinson use bootstrapped cascode connection, where the voltages on the base of upper devices decrease, when Ice increase. This can keep the dissipation constant.
Sajti
let's see with numbers:
I use BC546/556 LTPs on the input. The PSU+/-40V, Ice=2mA each.
My VAS use 120ohm degeneration resistor, and Ice=8mA. With this data, the the LTP-s use 820ohm resistors to drive the VAS (about 1.6V).
I use another 9.18k series resistor for every BCs to get +/-20V for the collectors. The LTPs have emitter degeneration resistors 220ohms each. With this resistors the LTP has 2 different gain. One for the BC's collector which is 10koms/440ohms, about 23, and another for the ouput 820ohms/440ohms about 2. The second is the valid.
I agree with You, if I reduce the Vce, and the change of Ice, I will reduce the change of the dissipation.
But my solution use the distortion cancellation for the input stage. All BCs have same dissipation changes during the driving, and -due the symmetrical topolgy- this distortions cancel each other.
Of course there is another solution to use this idea with cascode connected devices. Mark Levinson use bootstrapped cascode connection, where the voltages on the base of upper devices decrease, when Ice increase. This can keep the dissipation constant.
Sajti
jcx, thanks, it makes a lot more sense to me now. I am still not sure I understand the numerical issues involved, though.
In the output signal, up to 10 kHz, distortion components are down 115.5 dB, which is impressive in itself. I also observe that peaks at harmonics and peaks at non-integer multiples of 2 kHz have the same amplitude. These could be intermodulation products or more likely numerical artefacts.
I then observe that the input signal looks exactly the same, and this is worrying me, because it means everything we see on both input AND output must be dominated by numerical artefacts.
Then looking at the error voltage, I find that the distortion residual is much, much lower, and that non-harmonic products are largely gone.
My interpretation is this: transient analysis is done with a very large mantissa, but before FFT, this mantissa is somehow truncated. This means a FFT result can only have a certain dynamic range, and the FFT of the difference signal is more accurate exactly because we zoom in on the small difference of two small numbers. Correct?
If this is the case, and it boils down to a numerical trick, wouldn't it be better to have another divider equal to the R7/R6 divider, but not connected to the inverting input, and use this to generate an error voltage that does not contain the influence of nonlinear base current and parasitic capacitor currents?
Two more LT-spice questions:
- is it possible to save all those options such as turning off compression etc?
- what I meant by thermal simulation is actually some model for the heat capacitance of the die and the surrounding plastic - for this of course at least a thermal transistor model is needed. I assume the .step command won't do it? Of course, if we find a thermal model for a TO-92 small signal transistor someplace, we can always convert this into an RC model manually...
Regards,
Eric
In the output signal, up to 10 kHz, distortion components are down 115.5 dB, which is impressive in itself. I also observe that peaks at harmonics and peaks at non-integer multiples of 2 kHz have the same amplitude. These could be intermodulation products or more likely numerical artefacts.
I then observe that the input signal looks exactly the same, and this is worrying me, because it means everything we see on both input AND output must be dominated by numerical artefacts.
Then looking at the error voltage, I find that the distortion residual is much, much lower, and that non-harmonic products are largely gone.
My interpretation is this: transient analysis is done with a very large mantissa, but before FFT, this mantissa is somehow truncated. This means a FFT result can only have a certain dynamic range, and the FFT of the difference signal is more accurate exactly because we zoom in on the small difference of two small numbers. Correct?
If this is the case, and it boils down to a numerical trick, wouldn't it be better to have another divider equal to the R7/R6 divider, but not connected to the inverting input, and use this to generate an error voltage that does not contain the influence of nonlinear base current and parasitic capacitor currents?
Two more LT-spice questions:
- is it possible to save all those options such as turning off compression etc?
- what I meant by thermal simulation is actually some model for the heat capacitance of the die and the surrounding plastic - for this of course at least a thermal transistor model is needed. I assume the .step command won't do it? Of course, if we find a thermal model for a TO-92 small signal transistor someplace, we can always convert this into an RC model manually...
Regards,
Eric
Sajti,
it seems you have so much degeneration on the VAS that it comes close to voltage drive. Now, having a low gain on the LTP will certainly limit voltage swing on the input transistor, but you will pay a penalty in higher noise and offset drift. You might, I am not sure without having thought about in in detail, also be running into higher distortion.
Regards,
Eric
it seems you have so much degeneration on the VAS that it comes close to voltage drive. Now, having a low gain on the LTP will certainly limit voltage swing on the input transistor, but you will pay a penalty in higher noise and offset drift. You might, I am not sure without having thought about in in detail, also be running into higher distortion.
Regards,
Eric
Well, it certainly is possible to optimize transistor stages for near-constant dissipation. The question is what the magnitude of the effect really is and whether its contribution is really bigger than the added distortion due to loss of loop gain or Early-induced nonlinearity. For this we need measurements on individual transistors and/or modelling of thermal transients. I have reread Peufeu's pages, apparently, Microcap can do this.
Another approach is to look at THD vs. frequency. THD should rise as one goes to low frequency. The tested amp should not be using electrolytic caps for coupling or DC blocking, because they will cause similar behavior.
D. Self initially beheld that thermal distortion is one of the non-existent distortions. He later found one very early chip amp that did have the effect, but I have not seen any measurements on discrete amps that would suggest any significance of thermal distortion.
Another approach is to look at THD vs. frequency. THD should rise as one goes to low frequency. The tested amp should not be using electrolytic caps for coupling or DC blocking, because they will cause similar behavior.
D. Self initially beheld that thermal distortion is one of the non-existent distortions. He later found one very early chip amp that did have the effect, but I have not seen any measurements on discrete amps that would suggest any significance of thermal distortion.
capslock said:
Hi Eric,
the degeneration nothing else than local feedback. And this feedback reduce the distortion, both in LTP, and in VAS. The high degeneration in the input stage results high input impedance without large overall feedback. I never had any problem with the noise. My amplifier has 1V input sensitivity, so the noise is not critical. The offset is no real problem, due I use DC servo.
The only snag I found, is the higher input capacitance in the LTP due the Miller effect cause by the higher gain, caused by the 9.18k resistor.
Sajti
millwood said:
As I wrote, there was a long discussion about this distortion in a Hungarian newspaper. They use a special measuring to get the thermal distortion:
Use large squarewave signal (say 1V), with variable frequency. Put together with small sinus (say 100mV), high frequency. Drive Your amplifier with this signal. After Your amp get the sinus, with bandpass filter, and compare with the input. Set the delay, and level for the lower difference. And if You check with scope, You will see some deviation, at every positive, and negative going edge of the square wave.
Sajti
capslock said:
Hi Eric,
we try one modification to reduce this thermal distortion. It was simple MOSFET power amp, with LTP input (NPN devices), then LTP connected VAS with PNP devices. After we listen the amplifier, we cut the copper on the pcb, and put 2 resistors into the collector of the input stage. Than we listen again. And we heard the difference. The sound was smoother, and better detailed.
Sajti
After doing some math and Spice simulation, here is the very simple rule for having near constant power dissipation in the LTP input stage:
- Use emitter degeneration resistors
- Install cascode stages at both collectors.
- Do nor refer the cascodes to the emitters (as normally), but to the node where the two emitter resistors and the current source join.
- Chose the bias for the cascodes so that Uce of the LTP transistors is the same as the voltage across the emitter degeneration resistors.
This works fine if you use a rather high idle current (e.g. 10mA) and emitter degeneration (e.g. 100 R, resulting in Uce = 1V), as in an amplifier without overall NFB, where you want to have a very linear input stage.
Whether the distortion thus being removed is audible, is another question ... Any experience?
Cheers,
Gerhard Wolf
- Use emitter degeneration resistors
- Install cascode stages at both collectors.
- Do nor refer the cascodes to the emitters (as normally), but to the node where the two emitter resistors and the current source join.
- Chose the bias for the cascodes so that Uce of the LTP transistors is the same as the voltage across the emitter degeneration resistors.
This works fine if you use a rather high idle current (e.g. 10mA) and emitter degeneration (e.g. 100 R, resulting in Uce = 1V), as in an amplifier without overall NFB, where you want to have a very linear input stage.
Whether the distortion thus being removed is audible, is another question ... Any experience?
Cheers,
Gerhard Wolf
I have another distortion, measured in my amplifier. I read this measuring method for TIM, but I'm not sure.
The steps:
1, remove the input LP filter
2, apply square wave signal at the input, with very fast edges
3, see the signal on the collector of the LTPs, with scope
You will see overshoot on the square wave, caused by the delay of the nfb. If this overshoot is large it can drive the VAS into saturation, and results distortion.
Sajti
The steps:
1, remove the input LP filter
2, apply square wave signal at the input, with very fast edges
3, see the signal on the collector of the LTPs, with scope
You will see overshoot on the square wave, caused by the delay of the nfb. If this overshoot is large it can drive the VAS into saturation, and results distortion.
Sajti
sajti said:
there is a school thinking that for an amp to sound good, a good stability margin is very important.
I would always try to design my amp as fast as possible and then for stability use a compensaion cap between VAS and - ip. A higher comp cap value should stop this overshoot.
but as the amp would never normally see rise times this fast and therefore the VAS is not driven into saturation, how do you understand that this affects the sound quality in normal operation ?
mike
sajti said:
Sajti,
If you have measured this in a closed loop amp, the overshoot most probably is the feedback trying to correct for hi-freq roll-off later in the amp. For instance, having a miller cap, the input stage must supply extra drive to charge/discharge this cap to keep the output the same waveshape as the input. The feedback causes extra input voltage at the LTP to have extra drive at the rising & falling edges, so this is seen as overshoot.
This is how feedback works.
Jan Didden
The overshoot caused by the delay of the feedback. If Your amplifier is very slow You can get the overshoot as high as the feedback rate. (I measured it!)
I agree, that the solution can be to keep Your amplifier as fast as possible.
As You read I recommend to remove the input filter. This is only to see the overshoot. But this measuring helps to set the input filter for proper frequency. Start with high frequency (such as 500kHz), and go down step by step, and when the overshoot disappear You found the proper values.
I found that typical compensation (Ccomp between the VAS collector, and base) increase the overshoot.
Local feedback from the ouput of the VAS, back to the nfb. point of LTP decrease the overshoot.
I recommend to keep some headroom for the LTP's output, to avoid saturation.
Sajti
I agree, that the solution can be to keep Your amplifier as fast as possible.
As You read I recommend to remove the input filter. This is only to see the overshoot. But this measuring helps to set the input filter for proper frequency. Start with high frequency (such as 500kHz), and go down step by step, and when the overshoot disappear You found the proper values.
I found that typical compensation (Ccomp between the VAS collector, and base) increase the overshoot.
Local feedback from the ouput of the VAS, back to the nfb. point of LTP decrease the overshoot.
I recommend to keep some headroom for the LTP's output, to avoid saturation.
Sajti
sajti said:
If you think it through, you will realise it is not the delay of the feedback. The feedback normally is just a simple resistive devider. What you see, I repeat, is that the feedback pushes the input LTP to supply extra drive to charge/discharge the compensation cap, or, in general, to make sure the output follows the input. There is a balance between the input signal and the feedback signal at the other side of the LTP. If, with fast square waves, the output is not high enough, the feedback return is less, the effective input signal to the LTP increases and this gives higher LTP output: the overshoot you see.
That is also why changing the comp cap changes the overshoot, although there is no change to the feedback network.
If you lower the input LP filter until the overshoot disappears, I think you just find the amp open loop 3dB frequency.
Jan Didden
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