My brain is almost useless...
I have built this little gem on Peter's boards, but it needs to build an enclosure yet. At place of -input cap I use a jumper, so I can short out this.
I have built this little gem on Peter's boards, but it needs to build an enclosure yet. At place of -input cap I use a jumper, so I can short out this.
Zen if I will use your Babelfish J V2 front end where you have no coupling caps can I use it with the legato 3.1 IV stage without any coupling caps between the IV and the amp?
Please take a look to post #1793
Please take a look to post #1793
Can anyone tell what is the input impedance of the aleph j when used with balanced input ?
In se is 242K meaning in bal is 242/2 per phase?
Thanks
In se is 242K meaning in bal is 242/2 per phase?
Thanks
when using balanced input , negative phase is virtual gnd to positive phase ,and other way around
go figure 😉
so , you can exclude 220K resistors out of equation
go figure 😉
so , you can exclude 220K resistors out of equation
The sum of gate-source impedance of the two input fets?
It's getting a little bit over my knowledge so I'm guessing...
It's getting a little bit over my knowledge so I'm guessing...
220K is gate - gnd impedance , for positive input Jfet , while gate -virtual gnd impedance , for negative input JFet ...... in case of SE input
gate-source impedance is different thing , irrelevant here
re-read what I wrote in #1810
gate-source impedance is different thing , irrelevant here
re-read what I wrote in #1810
when using balanced inputs , two gates are practically common node for differential/balanced source ...... so pracvtically invisible/irrelevant
so , everything (as load ) positive side of source is seeing is nothing else than negative side of source
and other way around
what you have of resistances in that path is practically (effective) load resistance;
that's always counting on fact that source itself is having negligible output impedance , but that's entirely different part of picture .......
so , everything (as load ) positive side of source is seeing is nothing else than negative side of source
and other way around
what you have of resistances in that path is practically (effective) load resistance;
that's always counting on fact that source itself is having negligible output impedance , but that's entirely different part of picture .......
now I see that I mixed up your words ..... I took that "source" as JFet electrode , while you meant on signal source
so - yes , sum of resistances between signal source (legs) and JFet gates
from j74 datasheet the input impedance per device will be 25000megaohms @ vgs 25V if I do the calculation right.
So for our input stage it will be the double of that value?
So for our input stage it will be the double of that value?
22.1k/phase🙄 or a sum of 44.2k
In this case I will need pretty big caps for dc coupling ...
In this case I will need pretty big caps for dc coupling ...
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Phew... 12uf/phase is a lot of capacitance and money that I have to throw in my dac to go balanced to the amps, all this to eliminate an opamp that is doing bal/se for the legato iv of my dac and allows me to direct couple the amps to him.
Does it worth to go balanced from the iv to the amps(this way eliminating the opamp)? because I was thinking at transformer coupling(this way I have a nice hf filter too) or a balanced buffer that will accept on his inputs the ~7v dc on the legato outputs referenced to ground and has the output at 0v.
I`m a little bit confused
Does it worth to go balanced from the iv to the amps(this way eliminating the opamp)? because I was thinking at transformer coupling(this way I have a nice hf filter too) or a balanced buffer that will accept on his inputs the ~7v dc on the legato outputs referenced to ground and has the output at 0v.
I`m a little bit confused