Aleph Bet, a single stage, single ended ultra low distortion buffer

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https://www.diyaudio.com/community/attachments/k170-j113-aleph-sch-png.1206117/

1V/5kohm load
 

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I would love to be able to sim some tubes circuits but I honestly I don't know where to Start
I have already big difficulties with simple basic CFPs
But I have got a feeling that these Sim softwares are wonderful
A great help for design indeed
 
Aleph Bet is a single stage, single ended, unity gain, line level buffer that can drive a 2kOhm load with vanishingly low distortion ....


View attachment 1191573
Sorry it is me again Just to understand better the " ... single stage, single ended, unity gain, line level buffer that can drive a 2kOhm load with vanishingly low distortion .... " is the one in the schematic above ?
i see many schematics proposed Thank you
 
with all the due respect i did not know you were interested in the thread given that it is your first post not related to the topic
I want to know more and i ask ... the last post was almost one year old So i tried to brought up the topic again
Because i am interested
And yes every time i find a very good circuit i have this vice to try to sim it It is the only serious approach to my mind
I prefer figures and graphs and measurements to chit chat
 
With all the due respect, I’m also interested in this topic. It seems to me that @alexcp did not finish his explainations, and @ginetto61 did not provide the schematics that gives the fantastic result he showed (and that I was unfortunately not able to reproduce). That’s why, maybe, it’s a good idea to revive the thread.

Well, to start with, I’m interested in such a buffer for a voltmeter input stage (range ±1V or ±10V if possible) that I‘m working on. My specs are a BW from DC to 100kHz with a noise level below 6nV/sqrt(Hz) down to 1Hz (below 1Hz is another story). Of course, high input impedance and not too high output impedance are mandatory. If it’s possible to make it work on the ±10V range, the buffer shall be able to handle at least 48V (that’s ±24V relative to ground) at a bare minimum without destruction.

To describe what I did so far:
  • I reproduced in simulation the schematics given by @alexcp in #15 and got similar results, like a 70dB SFDR with 6Vcc in a 2kΩ load.
  • I measured a very bad noise performance (for my application) and figured out it was mainly caused by the J113 cascode
  • I changed all components to use BJT I’m familiar with, and converted the design to handle DC. I guess it’s still an Alpha Bet buffer.
My schematics is currently this one (if someone is interested in the .asc file, I’ll post it here):

Alpha bet like - 640.png

The output impedance is 150Ω so it handles without problems a 2kΩ load at 2Vrms.

The bandwidth is ok, DC to 110MHz:
Alpha bet like - ss response.png


Distortion-wise it’s good. SFDR is around 136dB with a 2kΩ load at 2Vrms:
Alpha bet like - distortion.png


And it terms of noise, it’s ok but a bit disapointing:
Alpha bet like - noise.png


But it’s still far from perfect 🙁 Input impedance is weird, output impedance is a bit high and the power consumption is very high. Anyway, one fantastic property of this design is that it can handle high voltages because VDS and VGS of the frontend FET are severly restricted.
 
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My voltmeter will acquire signals from DC to 100kHz and perform AD conversion with an AD4030-24. It needs to have a high input impedance (i.e. > 10GΩ) with a low bias/leakage input current (i.e. about 1pA at 25°C). To match with the AD converter, the analog frontend shall have a SFDR better than about 120dB and a noise floor around 6nV/sqrt(Hz) (the ADC’s noise floor is expected to be around 12nV/sqrt(Hz)).

To the best of my knowledge, there is no op amp available with such performances. Therefore, an hybrid system has to be build, for instance like this:
one way to do it.png

Of course a low distortion differential buffer, FET based, is far better and I’m currently trying to convert the Alpha Bet to differential.

It has to be buffers at high amplitude (±10V for instance) because building a feedback loop is difficult in such a case. And because, there is no feedback, the buffer distorsion has to be as low as possible.
High end DMM prefer to add an attenuator on the input (they usually have only one, because Input Lo is connected to ground). But I’m reluctant to do it because of the added noise.
 
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With all the due respect, I’m also interested in this topic. It seems to me that @alexcp did not finish his explainations, and @ginetto61 did not provide the schematics that gives the fantastic result he showed (and that I was unfortunately not able to reproduce). That’s why, maybe, it’s a good idea to revive the thread...
hi please excuse me but i am able to reply just now
I have the file on another computer at home I will provide it asap
I would like to add that i am looking for more basic circuits at present
I am aware that simplicity will not provide ultimate performance but the improvement could be marginal from a listening point of view
Congratulations for your project Kind regards gino
 
I had a look at this thread today for the first time. It seems that the circuit in post 1 is not explained
in the following posts. Looking at the schematic I notice :
  • there is no ground reference for T1 gate,
  • T1 is operating with about 0.6V Vds only,
  • there is no path for T3 base current to go,
  • floating source U1 may be a problem, can it be substituted by say a LED or is a battery required?
I think this proposal needs more explanation and practical proof, may be it is a simulator exercise
only.
 
T3's base current flows through U1.

My schematics published above obviously do not show all the details but rather highlight certain aspects of the design. With a suitable implementation they all work in hardware, as evidenced by the measured spectra. I intend to provide additional information later this year.
 
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