En mi caso, si encendí el amplificador con una señal de entrada intensa, el transistor con el colector a tierra se destruyó. Mi primera solución fue poner una resistencia en el emisor del otro transistor para detectar la corriente, y usando un tercer transistor construí un limitador de corriente. Por último, una solución más sencilla, aunque añade algo de capacidad adicional y no lineal, fue poner un diodo en paralelo con el 30pF (100pF) en mi caso. Fin del problema para mí.
I put a 100 ohm to 1k resistor in the collector of the beta helper to ensure it can't break into HF (20-50 MHz) oscillation. Also, very important, keep the beta helper emitter load resistor low in value 470 ohms to 1k and no higher. It goes without saying, a Baker clamp is required. Most of the charge storage leading to rail sticking will be in the VAS transistor, although on low Cob devices, it is generally not too bad. I try to make sure its always < 1us on gross overdrive.
yes, i tested at 1k and 20k
i thought maybe the output stage is masking the results, so i repeated the 20k test without the ouput stage
bare vas 0.0015 vas+buffer 0.0002 - an improvement but only if the output stage allows it (not in my case)
100 to 1k in the collector won’t miller multiply that many times. It keeps the gain to the collector low, which is what helps the HF oscillation. Putting 20k in there is the wrong way to prevent rail sticking or burning up the follower - the Baker clamp or fold back limiting is. 470 ohms emitter load puts the current at 1.2 mA, which is a good place to be. Well above 1k and there just isn‘t enough current in the buffer.
The issue I have with Baker clamps is the voltage capability of the diode. Put ones in there that will take 300 volts of swing and still have a low Trr their turn-on voltage is too high to do any good (transistor saturates anyway). The only solution there is to put another diode in series with the base to make a 1.2 volt turn on. Then you can’t suck out what charge there is. If your amp stays within the capability of a 1N4148 things are a bit easier. The current limiter will produce a 1 or 2 volt “blip” due to the drop in the emitter resistor, but out of 100, 150 V it’s not enough for me to hear, especially at the SPL generated. Neither is 2 us of rail stick, either.
Sorry.
In my case, if I turned on the amplifier with a strong input signal, the transistor with the collector to ground was destroyed. My first solution was to put a resistor on the emitter of the other transistor to sense the current, and using a third transistor I built a current limiter. Finally, a simpler solution, although it adds some additional and non-linear capacity, was to put a diode in parallel with the 30pF (100pF) in my case. End of the problem for me.
The reverse-biased diode in parallel with Cdom is the Baker clamp. It is supposed to forward-bias when the VAS tries to saturate, stealing the excess drive which would have burnt out the buffer or fully saturated the VAS (resulting in rail sticking).
The catch is it needs a low turn-on voltage. Schottkys would be real nice if they weren’t so damn leaky.
The catch is it needs a low turn-on voltage. Schottkys would be real nice if they weren’t so damn leaky.
The issue in the collector is you often have trace inductances (same in the emitter and base) and that interacts with stray capacitances which can lead to oscillation. In emitter followers - and especially ones using small signal transistors with high fT - high emitter load resistors and the aforementioned L and C, form Colpitt's oscillator structures (see Cordell et al). I've had two cases of this - the first on the e-Amp where I used 2N5551/2N5401 and they oscillated at 180 MHz and a second on one of my amps a few years back where the emitter load resistor as set too high and builders got 80mV oscillation at 20-40 MHz. In the latter case, the fix was to drop the emitter load resistor to 1k and that solved the problem. In the e-Amp, 1k SMD base stoppers solved that problem.
Baker clamps will divert base current away from the transistor effectively because in a beta helper situation, you have the Vbe drop of the first transistor and then the saturated collector voltage on the main transistor which when turned on will be to within 100-200mV of the emitter voltage. The 0.6-0.7 V across the Baker clamp diode will be conducting almost all of the excessive base drive, leading to overhang after the input drive signal moves beyond causing the amp to clip.
Rail stick is important because in a lot of designs, you get overshoot as the loop regains control. In any event, when an amp clips, it's running open loop and you want to get out of that as quickly as possible without loop anomalies.
https://hifisonix.com/wp-content/uploads/2019/02/Anti-Saturation-Diodes.pdf
https://hifisonix.com/technical/cascode-amplifier-oscillation/
Buffering the VAS input increase considerably its linearity, that s one case where the added cost is negligible
in comparison of the amp s perf improvement, most 70s basic amps lacked this improvement which would had
made a big difference in perceived sound quality.
As pointed by Bonsai it s necessary to put a resistance in serial with the buffer collector to keep it from being exloded
in case the amp is clipped, personaly i put values as high as 4.7-10k depending of the supply voltage and such that
its max current is limited to a handfull mA.
Also it require a slightly higher Cdom, say 56-68pF instead of 47pF FI.
in comparison of the amp s perf improvement, most 70s basic amps lacked this improvement which would had
made a big difference in perceived sound quality.
As pointed by Bonsai it s necessary to put a resistance in serial with the buffer collector to keep it from being exloded
in case the amp is clipped, personaly i put values as high as 4.7-10k depending of the supply voltage and such that
its max current is limited to a handfull mA.
Also it require a slightly higher Cdom, say 56-68pF instead of 47pF FI.
There are at least two effects coming into play with a buffered VAS.
One major improvement in linearity is through the use of a current mirror which drives it. This eliminates a potential base resistor, and instead offers an effective impedance perhaps getting on for a couple of megohms. That pretty much drives the buffer (or, indeed, a VAS if no buffer is used) with a current source, eliminating the Vbe non-linearity and replacing it with any hFE:Ic non-linearity, which is a lot less than the Vbe.
The second is that the base current required to drive the VAS is a lot less. That automatically improves linearity by reducing the variation in current needed for the base. Which is the same thing as saying that the open loop gain is increased.
There may be an advantage in using a potential divider resistor for the collector, and adding a small capacitor, perhaps with another low value current limiting resistor in series, to the negative rail to reduce the effect of Cjc, and maybe even reduce noise from the negative power rail. Obviously a lower Vce will increase the capacitance, but the bypass should mitigate that.
One major improvement in linearity is through the use of a current mirror which drives it. This eliminates a potential base resistor, and instead offers an effective impedance perhaps getting on for a couple of megohms. That pretty much drives the buffer (or, indeed, a VAS if no buffer is used) with a current source, eliminating the Vbe non-linearity and replacing it with any hFE:Ic non-linearity, which is a lot less than the Vbe.
The second is that the base current required to drive the VAS is a lot less. That automatically improves linearity by reducing the variation in current needed for the base. Which is the same thing as saying that the open loop gain is increased.
There may be an advantage in using a potential divider resistor for the collector, and adding a small capacitor, perhaps with another low value current limiting resistor in series, to the negative rail to reduce the effect of Cjc, and maybe even reduce noise from the negative power rail. Obviously a lower Vce will increase the capacitance, but the bypass should mitigate that.
This is how I do it Hennady, but without Cadd. The Baker clamp diode goes across the 30pF capacitor, with the anode on the collector of the 2nd transistor and the cathode on the base of the first one. See also dadod's idea in the first presentation I linked to in post #30 - this is also a similar approach to the one wahab is proposing. I have not tried this myself, but the simulations look ok.
With the Baker clamp diode, the peak current in the VAS transistor is very well controlled (just a bit more than the standing current), but you have to use a good quality diode like a Vishay or Nexperia BAS21J. Both these devices have fully characterised reverse bias capacitance and its very low, so that's why I recommend them for this job.
With the Baker clamp diode, the peak current in the VAS transistor is very well controlled (just a bit more than the standing current), but you have to use a good quality diode like a Vishay or Nexperia BAS21J. Both these devices have fully characterised reverse bias capacitance and its very low, so that's why I recommend them for this job.
I avoided the low-capacitance diode by clamping the VAS output (which is current-limited). Clamping the output was necessary due to multiple rails.
Ed
It’s clear for Baker, the second drawing is probably his full version. Those. in a composite transistor, the B-E junction replaces the diode.