Hi all,
I am thinking of building a hybrid passive-active RIAA preamplifier for MM cartridges. I want it to have JFETs at the input to reduce current noise and get rid of issues such as DC offset (which is more or less inevitable with BJTs because of base current flowing through the biasing resistor).
I am attaching the circuit diagram of a simple discrete opamp with cascoded JFET input which is driving a BJT LTP loaded with a current mirror. Do you think it would work?
I'd like to use it as a flat gain stage followed by a passive RC network for the 75us corner of the RIAA EQ curve. The second stage will supply additional 20dB of gain at 1kHz using active equalisation for the 318us and 3180us time constants.
I am thinking of building a hybrid passive-active RIAA preamplifier for MM cartridges. I want it to have JFETs at the input to reduce current noise and get rid of issues such as DC offset (which is more or less inevitable with BJTs because of base current flowing through the biasing resistor).
I am attaching the circuit diagram of a simple discrete opamp with cascoded JFET input which is driving a BJT LTP loaded with a current mirror. Do you think it would work?
I'd like to use it as a flat gain stage followed by a passive RC network for the 75us corner of the RIAA EQ curve. The second stage will supply additional 20dB of gain at 1kHz using active equalisation for the 318us and 3180us time constants.
Attachments
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Yes, the simulation does work, and I even took some care to calculate the operating points of the circuit (instead of my usual guesswork).
I actually started with a PNP LTP for the 2nd stage, but later flipped everything after the input stage around to take advantage of the same reference voltage for all three current sources.
I actually started with a PNP LTP for the 2nd stage, but later flipped everything after the input stage around to take advantage of the same reference voltage for all three current sources.
Attachments
If a circuit of this type works as a simulation OK then it should be transferable to a real build without to much drama. It might be worth trying different model JFET's to be sure its not on a knife edge somewhere but otherwise if it works... it works and should do for real.
I am very confident in the input stage because I lifted it almost verbatim from the LSK489 application notes written by Bob Cordell 😀 And much less confident in everything else because I did it myself, but then again a basic discrete opamp is no rocket science...
Played with different low noise JFETs in LTSpice -- they all seem to work well. Interestingly, 2SK246 simulates a touch better than the LSK489, but I'm going to stick with the LSK489 because of availability and low input capacitance. Maybe I will replace the cascode JFETs with 2SK117, I have several matched pairs that I bought a long time ago for an abandoned project, they should work in this position just as well.
There is only 1mA in Q2.
Leaving only 0.5mA in Q4 and Q1.
This seems to be on the lower side.
Leaving only 0.5mA in Q4 and Q1.
This seems to be on the lower side.
Thanks lineup, I started with a "self-biasing" cascode, and that configuration worked better when the current flowing in the 2nd stage was lower than the current flowing in the input stage. I later decided to use a potential divider to position the gates of cascode JFETs at 1/2 of the positive supply voltage, this configuration performs much better overall and the LTP current can now be increased to a more reasonable value (e.g. ~1mA per side).