The diodes can be anything, really. They're reverse biased (= off) in normal operation. They only conduct when the input voltage exceeds the power supply voltage of the opamp. If you optimize for anything, I'd optimize for low leakage current when reverse biased and low capacitance. I often use BAV99 or BAV99S. The 'S' contains two series diode pairs. They're available in SOT-23 and smaller packages.
Tom
Tom
I have the impression there are three different circuits, each consisting of two diodes, being discussed now.
Back to back diodes or a 10uf cap at the input along with 220 ohm resistor into the input pin would have saved your cart. I use shunt regulation on the input stage so that the current draw is limited to 15 ma.
If my math is right, 73 Ω would have the same equivalent noise as the OPA1611/12 at room temperature. You'd probably want to stay below 10-20 Ω to avoid having the resistor pop up in the noise analysis. 10-20 Ω wouldn't offer much protection.
Tom
Tom
Maybe I'm missing something here, but surely the OPA161x already has antiparallel diodes across its inputs, or at least that's what I see on the 'functional schematic' on page 1 of the datasheet.
Like I wrote in post #42, there is a difference: unlike those in the OPA1611, the diodes of Hans are not in a common substrate with the op-amp, so any current flowing through them cannot trigger latch-up. I don't know if that is the correct explanation, but it is the only one I could come up with.
All true Marcel, but you need a pretty decent SCR to cause latch-up. The protection devices are usually pretty small and far away from any structure that can help forming that parasitic SCR. As I wrote in Post #71 that's something that's checked for during the design. It is extremely unlikely that the device latched up in a way that sent large amounts of current through its non-inverting input. Not only would the parasitic SCR need to be present (i.e., missed by the checker or ignored by the designer). It would also need to be of a decent enough quality to trigger. Further, it would need to be connected such that some high-current output or the power supply connected to the non-inverting input. That seems like a bit of a stretch.
Is it impossible that the protection diodes caused latch-up and fried the chip? No. Because as any attorney will tell you, nothing is impossible. But we don't have any evidence that latch-up is the cause or that an external pair of protection diodes would have helped in OP's case.
Since we're speculating anyway, how about this scenario: The VCC drops momentarily to below ground potential. The ESD structures on the non-inverting input turn on. Those are pretty beefy diodes that can sustain some current (a few ampere). That'd fry the cartridge. As would the opposite scenario where VEE moves above ground.
Now, @Gasho said the issue happened during operation and only fried one channel, so that seems unlikely as well. But is it possible.
It sure would be nice to know how the chip failed, assuming it failed. Or if it's still working, does it perform to spec?
Tom
Is it impossible that the protection diodes caused latch-up and fried the chip? No. Because as any attorney will tell you, nothing is impossible. But we don't have any evidence that latch-up is the cause or that an external pair of protection diodes would have helped in OP's case.
Since we're speculating anyway, how about this scenario: The VCC drops momentarily to below ground potential. The ESD structures on the non-inverting input turn on. Those are pretty beefy diodes that can sustain some current (a few ampere). That'd fry the cartridge. As would the opposite scenario where VEE moves above ground.
Now, @Gasho said the issue happened during operation and only fried one channel, so that seems unlikely as well. But is it possible.
It sure would be nice to know how the chip failed, assuming it failed. Or if it's still working, does it perform to spec?
Tom
If you mean the standard latch-up DRC/ERC checks: in my experience, they are not always sufficient. Besides, designers of low-noise circuits cannot always follow the ESD and latch-up rules to the letter. I have had a couple of prototype chips fail during latch-up testing over the last 28 years, albeit not many. I wouldn't know how to avoid SCRs in layout, only how to increase their trigger and holding currents. By the way, the anti-parallel diodes on the chip have to be reasonably large, as otherwise they would fail during an ESD discharge between the op-amp inputs.
Then again, ICs are usually latch-up tested up to 100 mA input currents and only put into production once they pass. Where does that 100 mA come from when you are just listening to a record?
It remains a big mystery what happened.
Then again, ICs are usually latch-up tested up to 100 mA input currents and only put into production once they pass. Where does that 100 mA come from when you are just listening to a record?
It remains a big mystery what happened.
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A typical ESD discharge pulse has an amplitude in the ballpark of 10amps - with a duration close to 1ns. This is the trigger scenario I suspect.
Why in the world do you have a DC coupled phono stage?
It's the one signal in your whole system that's lousy with subsonic garbage. It's the one signal that's guaranteed to work better if the lowest frequencies are left behind.
My two cents: DC coupling makes no sense for phono.
It's the one signal in your whole system that's lousy with subsonic garbage. It's the one signal that's guaranteed to work better if the lowest frequencies are left behind.
My two cents: DC coupling makes no sense for phono.
cvanc - DC coupling eliminates electrolytic capacitors. Only mass-market equipment is full of electrolytics.
Ed
Ed
Caps don’t improve sound, although this doesn’t automatically say that they always make it worse.
But the less caps in your system, the smaller the likelihood that they are affectecting the sound.
Following this rule implies: less is more and no caps behind your Cart.
And yes, depending on your system you might need a rumble filter.
But with my ESL’s I don’t even need that.
Hans
As far as I can tell no one has mentioned the highlighted "Edge-Triggered ESD Absorption Circuit" which appears to be a rail-to-rail crowbar.
In the original preamp image I see what appears to be some honkin' big bodacious bypass capacitors.
What if the MC cart - with its' response out to tens of kiloHertz - playing a click or transient or static discharge, triggered the OPA1611's internal ESD crowbar and it attempted to discharge hundreds if not thousands of µF of rail bypass?
1) Added input series resistance as suggested is a non-workable solution for an MC preamp.
2) When the internal fault occurred it likely created a fast-rise transient. If an input capacitor had been present the peak current would still likely have damaged the cart.
3) Hans' solution, until we learn otherwise, seems to be the most practical. Why it works we may never know.
In the original preamp image I see what appears to be some honkin' big bodacious bypass capacitors.
What if the MC cart - with its' response out to tens of kiloHertz - playing a click or transient or static discharge, triggered the OPA1611's internal ESD crowbar and it attempted to discharge hundreds if not thousands of µF of rail bypass?
1) Added input series resistance as suggested is a non-workable solution for an MC preamp.
2) When the internal fault occurred it likely created a fast-rise transient. If an input capacitor had been present the peak current would still likely have damaged the cart.
3) Hans' solution, until we learn otherwise, seems to be the most practical. Why it works we may never know.
I did and I agree. The series resistors in the supply lines is particularly good advice.
Here's what the OPA1611 datasheet says in the first text portion on page 14 (rev. Aug 2014):
Ok that's only for power up, but what about ESD?
However, this action reminds of a crowbar style protection circuitry, it would require a smart power supply design which collapses above a certain current load threshold in order to release the ESD protection circuitry.
At the very end on page 12 the datasheet also mentions:
and...
In extreme but rare cases, the absorption device triggers on while +VS and –VS are applied. If this event happens, a direct current path is established between the +VS and –VS supplies. The power dissipation of the absorption device is quickly exceeded, and the extreme internal heating destroys the operational amplifier.
Ok that's only for power up, but what about ESD?
However, this action reminds of a crowbar style protection circuitry, it would require a smart power supply design which collapses above a certain current load threshold in order to release the ESD protection circuitry.
At the very end on page 12 the datasheet also mentions:
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly.
and...
This protection circuitry is intended to remain inactive during normal circuit operation.
Normally the external power supply decoupling capacitors are supposed to keep slope-detecting ESD clamps from triggering during normal use. Besides, they are often designed to switch off again after a microsecond or so. Maybe the OPA1611 clamps clamp a bit too easily and too long? Who knows except TI?
I agree. And those diodes along with an emitter of some kind become the parasitic SCR. So 'emitters' are kept far away from the ESD structures.
I've had one case of a soft latch-up (on the LM3886, actually) that resulted in extreme supply current. Enough current to trip the current limiter in the lab supply connected to the amp. This was repeatable and the device would recover and work perfectly after cycling the power. I don't know what would have happened if the current limiter hadn't been there. I ended up figuring out the root cause and addressing it with a bit of external circuitry.
In cases of hard latch-up it's been my general experience that the chip turns to slag. I can't think of a way that this would result in extreme current though an input, but also can't say definitively that it won't happen.
That would require that the cartridge produced a voltage that exceeded the power supply voltage by enough to forward bias the ESD diodes on the input pin and enough current to charge the supply capacitance at a fast enough rate to trigger the rail clamp. That seems unlikely. Clicks and pops have pretty steep edges, but they're not that steep.
... or to switch off once the supply has discharged. The clamps are pretty beefy. They're designed to harness the energy from an ESD strike after all. Given that the OPA1611 is rated for 3 kV (HBM); 1 kV (CDM); 200 V (MM) the clamp in the OPA1611 can certainly handle a bit of energy. But it will fail if you keep amps of current flowing through it for long enough.
Maybe @johnc124 can provide some insight.
Tom