New Stasis front end

how much more is complicated to mount T03 case transistors on heatsink?

considering custom hardware pieces needed for that , there is no way that T03 approach isn't at least twice in cost, comparing to flatpacks

only in case that:

-one already have T03 in quantity,
-one have necessary tools
-one have necessary skill to make it .........
using T03 is not exercise in stupidity

of course, if T03 approach is strictly to have Zen practice, I can't complain and everything is justified per se........... but in that case - to elevate one's Zen, I strongly advise using only hand tools - files, hand-drill, and hand-saw

maybe still best - not using any tool at all, doing it with Pure Power of Will, as Papa is doing

🙂
 
Heh Zen Mod, back in post #235 you mentioned matching the output devices for Vbe. I have been testing some candidate transistors, and for my preferred Sanken types, I have found the following spread, out of 30 tested.

NPN / 2SC3263 = 0.625V to 0.630V for Vbe, = 5mV matching.
PNP / 2SA1294 = 0.610V to 0.615V for Vbe, = 5mV matching.

1. Do you consider that Vbe spread for each type to be matched well enough? If not how close should it be?

2. Does it matter that the NPN types measure on average 0.014V higher for their Vbe over the P types. nothing much can be done about this.

3. Does it only matter to match N to N types (and P to P), and not N to P types?
 
1. say that , with my sorta limited experience with matching of wast number of power bjts, I'm seeing 5mV as excellent match

2. no need and no use of matching N with P

3. exactly - that's same as mosfet matching for OS duty - you need to match only in polarity group and only in number covering tied group ; here, for 1+5 OS - matched sextets, for 1+7 OS - matched octet

one general remark - I did some pcb drawing here, but don't forget who's Mithrandir - that same White Haired and Bearded Guy who posted all these Goodies in post #1 ..... he's The One who invented Stasis and some of trickiest questions still need to be addressed to him

I can and I'll chime in instead of him whenever I think I know the answer, but one can't never be so sure in my answers, same as they are given by him
 
A belated "Thank You' for the responses to my question about SUSY.

My other burning question is what is "babelfishing". I don't want to hijack the thread but it was mentioned that Zen Mod did not babelfish the Stasis front end.

Thanks.
 
Zen Mods Stasis O/S pcb layout for the output transistors ( both 6 and 8 pair designs) fits the heat sink UMS drilling pattern exactly - that being 40mm horizontal spacing with an 80mm vertical spacing.

Note, the actual O/S pcb has no mounting holes as ZM says all the transistor legs once soldered will be strong enough to support the pcb. Just use a few temporary spacers of suitable height to support the pcb while you solder all the transistor legs. Pass Labs design's use this method as well I believe according to ZM.

Both his FE pcb and the revised NP FE pcb that he added the 2 mounting holes to, will sit on the O/S pcbs with suitable spacers. Direct links being very short will then join the V+,V-,D+ and D- signals - so all very neat. The original NP new FE pcb as shown in post #1 will need to be mounted separately in the chassis.

So no problem in mounting all of this in the 4U, 500mm deep pico chassis. Plenty of room for a properly sized transformer and heaps of PSU capacitance as well.