I just finished (I hope!) my first project in KiCad. I have run the Design Rules Checker successfully and passed the unconnected items test. Is there any other tests that can be done (to avoid any mistakes) before generating the Gerber files and sending them to the PCB manufacturer?
If it's your first board I suggest you print it out actual size and go over the footprint sizes with the components (assuming you have them), and then double check the footprints against datasheet pin outs.
Certainly a good plan. Most errors are wrong footprints, drillholes too small etc. Consider bigger pads for hand-soldering smd-parts. Avoid heat-traps. Furthermore the 3D-preview is pretty helpful - after you have added all 3D-models to your footprints.
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All good advice, thanks. That 3-D viewer is awesome! Already saw a couple of errors just by viewing that!
Always backup any important work before any upgrade
There have been some symbol pin type corrections, which means that you may be offered the choice of rescuing the old symbol or changing to the new one
Bug fixes mean that there may be small adjustments to zone fills and clearance checking. The new ones should be more accurate
If you have to do 3d to catch errors the basic 2d part is seriously lacking.
The 2d components should show overlapping/interference with adjacent components.
The 2D part of KiCad is excellent and it is very easy to catch overlapping components and other issues.
3D viewer is extremely useful for catching a different kind of error- things like a trim pot that you won't be able to adjust, etc.
I also find that it's the fastest way to catch silkscreens that are positioned awkwardly. I can find them all in the 2D editor, but sometimes looking at my board from a different perspective highlights these issues since I can see what the board will visually look like from multiple angles.
It's definitely a cool feature that can help improve your layouts, because it's easy to see things that are going to be really, really annoying and awkward when it comes to the real physical board. Connectors that are too close together is a big one.
You obviously haven't worked with KiCad much, or you wouldn't make such a comment. KiCad's 2D does show overlapping and interference quite well. Where the 3-D does come in handy is, as H713 posted, is in seeing less-than-ideal silk-screen positioning.
Well, I just upgraded to v 5.1.7 and now I'm getting all sorts of power flag errors that I didn't have before. ?????????????????
Some noticed a comparator symbol have had power pins changed from Input to Power Input
This would trigger this ERC warning
This would trigger this ERC warning
Well, I actually switched BACK to v 5.1.6 and it didn't fix my problem. My problem with power flags was of my own making, as I had mis-defined the power pins in my I.C. symbol editor. I fixed that, which eliminated the power flag errors, but I had to go back and re-make the net list and re-import it to my pcb layout, which of course necessitated re-positioning the I.C.s and re-routing all my power tracks. AAARGHHH!!! Sometimes you just feel like jumping out the window!!
The netlist is redundant in V5.1.x, you use "update PCB from schematic"
Modifying symbols should not mess up existing layout
Modifying symbols should not mess up existing layout
If you manage to re-annotate the schematic, and change some or all of the part references, that will mess up the layout.
The update PCB options gives you two options to update by reference - if you keep them the same. Or if you do re-annotate the schematic, say to tidy up the references if they are random after lots of changes, you can update by timestamp (although I think the name has changed, it's the other option), and then it will associate parts by when they were created instead of the reference.
The update PCB options gives you two options to update by reference - if you keep them the same. Or if you do re-annotate the schematic, say to tidy up the references if they are random after lots of changes, you can update by timestamp (although I think the name has changed, it's the other option), and then it will associate parts by when they were created instead of the reference.
I find re-annotation is much more likely to be clean these days, modifying the schematic and then directly updating the PCB
This used to be a task that I dreaded
This used to be a task that I dreaded
In doing my layout (again!), are there any caveats that I should observe? My board is all analog, so no digital conflicts. I have just tried to keep the traces as simple as possible, sometimes ignoring the "default" routes.
OK. What "self-respecting" package that "does this flawlessly" would you recommend over KiCad? Thanks.
Personally I use Proteus from Labcenter in the UK. It does this completely transparently, both from the schematic capture as well as from the layout part.
For instance, once you've done the layout you can re-annotate the parts so they are numbered from top left of the board to bottom right of the board, either row by row or column by column, to make it easier to find a part on the board. That annotation is then automagically updating the schematic.
In the early days I used a package, I think it was Orcad, that worked with an intermediate file, a 'was-is' file that was generated when you re-annotated the schematic, and then you had to import it in the PCB app.
Are you guys saying that KiCad misses this basic stuff?
Jan
For instance, once you've done the layout you can re-annotate the parts so they are numbered from top left of the board to bottom right of the board, either row by row or column by column, to make it easier to find a part on the board. That annotation is then automagically updating the schematic.
In the early days I used a package, I think it was Orcad, that worked with an intermediate file, a 'was-is' file that was generated when you re-annotated the schematic, and then you had to import it in the PCB app.
Are you guys saying that KiCad misses this basic stuff?
Jan