The reason I asked.
Patrick
.
I always thought that the list of possible applications in a data sheet is more a marketing tool than a technical consideration. If I would design an opamp, I would try to list as many areas where it could be applied, even if some would be far fetched. An opamp sold is an opamp sold, even when mis-applied. 😀
Not saying this one cannot be used in audio, but listing 'Professional Audio' in the list of applications doesn't mean anything.
Jan
Could see it as a voltage reference buffer or something where the 1/f is critical, but not a lot else where it's the best option.
There are a lot of industrial applications where people want signals amplified in LF.
Say from DC to 1kHz.
Still hoping to hear from Scott about the chip making processes involved.
Patrick
Say from DC to 1kHz.
Still hoping to hear from Scott about the chip making processes involved.
Patrick
And noise goes up 5x between 100kHz & 10MHz (DS P.7).
So does LT1028 and 5534 and most (all?) multi-stage amplifiers. There's one that doesn't. 😉
So does LT1028 and 5534 and most (all?) multi-stage amplifiers. There's one that doesn't. 😉
Let me guess. It starts with 'A' and ends with 'D797'😀 ?
Edit: Patrick beat me to it....
Jan
More stuff - huge input C for a bipolar on a modern process without getting sub nanovolt. The lower 1/f could be partially running at very low current density. BIG power on glitch, at least it looks that way, I wonder what Ib does during that. This can equal latch-up in some circuits.
I'll believe that degree of input noise correlation when I measure it myself. Skip the Ib comp for a minute and simply consider the Ib of the two inputs of an LTP. By equipartion the bias current divides and both halves have full shot noise that is uncorrelated if that were not the case any bipolar op-amp would have the cancellation with balanced input. I'll have to check into this something doesn't add up.
Funny thing is if you read literally the TI OP27 datasheet the Ib noise is 100% anti-correlated!? That is in a balanced circuit the total Ib noise is 2X the individual ones not sqrt(2)X.
I'll believe that degree of input noise correlation when I measure it myself. Skip the Ib comp for a minute and simply consider the Ib of the two inputs of an LTP. By equipartion the bias current divides and both halves have full shot noise that is uncorrelated if that were not the case any bipolar op-amp would have the cancellation with balanced input. I'll have to check into this something doesn't add up.
Funny thing is if you read literally the TI OP27 datasheet the Ib noise is 100% anti-correlated!? That is in a balanced circuit the total Ib noise is 2X the individual ones not sqrt(2)X.
I know it is commercial secret, but I just wonder how you do it differently for the 797 ??
I cannot even measure 50nVp-p.
Parick
I cannot even measure 50nVp-p.
Parick
No that's just the way it came out the process has a lowish corner frequency.I know it is commercial secret, but I just wonder how you do it differently for the 797 ??
I cannot even measure 50nVp-p.
Parick
The AD797 is a mature product that has been in production for years. Is it still on the same process using the same masks? Is there a life expectancy for this stuff?
I was told that analog is not a fast profit segment but thanks to a very "long tail" can be very profitable when looking and the life cycle of the products.
I was told that analog is not a fast profit segment but thanks to a very "long tail" can be very profitable when looking and the life cycle of the products.
When you look at memory prices, and what equipment / process you need to make those.
And compare them to some high-end opamps from e.g. TI, AD, LT, ...... ,
you cannot held questioning which product has a higher margin.
Patrick
And compare them to some high-end opamps from e.g. TI, AD, LT, ...... ,
you cannot held questioning which product has a higher margin.
Patrick
The AD797 is a mature product that has been in production for years. Is it still on the same process using the same masks? Is there a life expectancy for this stuff?
I was told that analog is not a fast profit segment but thanks to a very "long tail" can be very profitable when looking and the life cycle of the products.
Same process bigger wafers, but actually transferred to CA, there are a lot of old parts like that that have been designed into products still in production. I'm not in on the process for obsoleting parts but I suppose the sales get pretty low on some and others never caught on. A few log computing/trig function circuits came out right at the time microprocessors were gaining ground and were obsoleted almost out of the gate.
Do larger wafers lead to larger variations across the wafer? Or is it just harder but technology improvements keeps all at same variance as with smaller wafer?
Just curious.
THx-RNMarsh
Just curious.
THx-RNMarsh
A lot of both, really. Compared to 1990, though, an entire 8" wafer now might be more uniform than an old 4". Uniformity is definitely a challenge, especially planarity during CMP steps.
Digital guys get spectacularly low variability across 12" wafers. That's how they get nonzero yield on ten billion transistor microprocessors. But them folks run 100X the number of wafers per week, and thus have 100X the number of "cycles of learning" per month, than analog guys. You don't want to build analog parts with digital process transistors, but you sure do want to build analog parts with digital process sigmas.
A lot of both, really. Compared to 1990, though, an entire 8" wafer now might be more uniform than an old 4". Uniformity is definitely a challenge, especially planarity during CMP steps.
Why can't we Still get lower variability for jfets/fets in all these years?
Just curious.
THx- Richard
Why can't we Still get lower variability for jfets/fets in all these years?
Just curious.
THx- Richard
At the physics level they are equivalent to bi-polar. FET's rely on sheet Rho over larger distances it comes out roughly at 10x worse one of the fab guys explained decades ago. He posited that that would not change much with process.
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Digital guys get spectacularly low variability across 12" wafers. That's how they get nonzero yield on ten billion transistor microprocessors. But them folks run 100X the number of wafers per week, and thus have 100X the number of "cycles of learning" per month, than analog guys. You don't want to build analog parts with digital process transistors, but you sure do want to build analog parts with digital process sigmas.
A friend that worked for Kodak told me one of their scientific CCD's had 3 die per wafer. Apparently 4 didn't quite fit.
Why can't we Still get lower variability for jfets/fets in all these years?
Just curious.
THx- Richard
xy-coordinates can be easily determined by masks with excellent precision.
Building the channel requires diffusion from the top and maybe even from the
bottom of the wafer. That is controlled by diffusion time, temperature, materials
and it goes much deeper than for a bipolar planar process. So you depend on
tiny differences of similar large values. Ion implant may help, but probably not
for the bottom gate structure.
Disclaimer: my chip baking experience dates back to the 8086/80286 time frame.
regards, Gerhard
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