poor jitter specs is not the same as jitter-poor...
Jitter-poor is more the absence of jitter than otherwise.
poor jitter specs is not the same as jitter-poor...
Jitter-poor is more the absence of jitter than otherwise.
Of course jitter-poor!! Sorry gebtlemen...
H.
If your oscillator uses AT cut crystal, it does indeed appear to offer unsurpassed close in phase noise for that crystal. Brilliant effort Herbert!
For the best of the best however, using SC cut crystal, I think NEL is about
as good as it gets with 1Hz offset of better than -120dBcand 10Hz offset of
almost -150dBc. 10MHz oscillator.
Not sure how they achieve this, maybe you have some insight?
OK - back to normal program.
Does anyone ever notice about MSB's femtoclock? -114db@1HZ is quite amazing. I wonder what oscillator/circuit they used inside the Femto 33. Here is the link
MSB CLOCK MEASURED: Galaxy Femto 77 Femto 33
Phase Noise at 0.1 Hz -67 db -72 db
Phase Noise at 1 Hz -99 db -114 db
Phase Noise at 10 Hz -134 db -145 db
Phase Noise at 1 kHz -157 db -157 db
Phase Noise at 10 kHz* -157 db -170 db
Phase Noise at 100 kHz* -157 db -170 db
Guaranteed TIE (1Hz - 1Mhz) 77 fs 33fs
MSB CLOCK MEASURED: Galaxy Femto 77 Femto 33
Phase Noise at 0.1 Hz -67 db -72 db
Phase Noise at 1 Hz -99 db -114 db
Phase Noise at 10 Hz -134 db -145 db
Phase Noise at 1 kHz -157 db -157 db
Phase Noise at 10 kHz* -157 db -170 db
Phase Noise at 100 kHz* -157 db -170 db
Guaranteed TIE (1Hz - 1Mhz) 77 fs 33fs
The NEL oscillators are quite good and available. The accepted gold standard for close in phase noise is an Oscilloquarz BVA at 135 dB at 1 Hz and 155 at 10 Hz but they were 1 YR lead time and around $10K. So irresistable audiophile fodder. Only for 5 MHz.
You will find the phase noise will scale with the frequency of the oscillator so a 24 MHz oscillator will have about 15 dB higher close in noise than a 5 MHz oscillator. There are tricks to improve on this but not trivial.
You will find the phase noise will scale with the frequency of the oscillator so a 24 MHz oscillator will have about 15 dB higher close in noise than a 5 MHz oscillator. There are tricks to improve on this but not trivial.
MSB is pushing the envelope, in marketing claims. If its really that good it would be a controlled device. When i inquired at Wenzel they told me I would need to sign a document for the DOD to get the clocks and could not export. Playing fast and loose with those rules will get a 20 year fed sentence.
Honestly what you care about is the effect in the audio output. At some point improvements will not get to the analog output. if it doesn't get there you aren't accomplishing much. We need to figure out how to measure improvements in the analog output. I have a few ideas. . .
Honestly what you care about is the effect in the audio output. At some point improvements will not get to the analog output. if it doesn't get there you aren't accomplishing much. We need to figure out how to measure improvements in the analog output. I have a few ideas. . .
...
@esgigt:
If I remember correctly there hasn't yet been posted any measurements on TWTMC's phase noise but in the beginning of the thread Andrea posted Herbert's (I suppose?) measurements on his oscillator - I reckon the aim is to achieve something similar with TWTMC - please correct me, Andrea, if I am mistaken here ... ?
Cheers,
Jesper
... Well, I for one would be all ears to hear about this ...
@esgigt:
If I remember correctly there hasn't yet been posted any measurements on TWTMC's phase noise but in the beginning of the thread Andrea posted Herbert's (I suppose?) measurements on his oscillator - I reckon the aim is to achieve something similar with TWTMC - please correct me, Andrea, if I am mistaken here ... ?
Cheers,
Jesper
Well, gentlemen, I rewrote one of my articles on the subject:
https://www.by-rutgers.nl/PDFiles/Reproducible Low Noise Oscillators.pdf
Please help me: what is TWTMC??
Cheers,
Herbert.
Agreed. We certainly can become obsessed with phase noise plots but it is,
as you say, end result.
I often think back to a local hi end modders Oppo clock upgrade using SAW
oscillators. There is, apparently, unanimous praise for the upgrade however
every scrap of measured evidence I can find points to worse LF phase
noise of the SAW.
As you say Demian, we need to figure out how to measure improvements in
analog OP.
Also there is the whole situation of controlled -added- phase noise to
-enhance- the audio. This is being done by at least one pro audio
manufacturer.
Thanks Herbert.
You mention the disparity and importance of (low) microphonics in Xtals.
The general claim is that SC-cut crystals are superior in this regard,
however there is varied information available. Do have any experience with
SC-cut crystals and effect on microphonics?
Also WRT mounting xtal to reduce microphonics, this is not easy. There
will always be some physical resonance and often the more isolation, the
lower the resonance point - ie; into that region deemed important.
Cheers
It's from the thread title. The Well Tempered Master Clock. The clock Andrea is working on.
I agree with you. I heard human ears are most sensitive to phase change. The traditional THD or TIM measurement may not reflect the clock's performance.
My apologies, Herbert for using this abbreviation, for I actually hate the use of abbreviations in general. The reason I wrote TWTMC is that I usually am too lazy to write it in full, so "The Well Tempered Master Clock"
# ouch, my fingers #
Hi Herbert ... I've just read your "Reproducible Low noise ..." document and even though some of it admittedly is beyond my (maybe "current", who knows?) understanding I find it quite interesting to read - thanks for sharing
I have a couple of questions, though, that I hope you may help answering:
1. Just before the 74HC04 in the "rutgerS'Clock" schematic on p. 6 there's a voltage divider consisting of two 22k resistors and a 1 uF capacitor. Assuming that one is within the passband of the 10uF//100nF decoupling capacitors of the 6.5 VDC supply then the cut-off frequency of the two 22k & 1 uF capacitor will be ~14 Hz (22k//22k). Won't this cause some LF instability of the oscillator, i.e. exactly in the frequency range where the oscillator should be stable? To this end: Would it be an idea to increase the 1 uF to e.g. 100 uF and thus lower the cut-off point?
2. This is a more general question ... What types of components do you use for the key components? E.g. Samuel Groner has made measurements on various capacitors and (to my memory) found that C0G capacitors have very low distortion and >100 VDC types were preferred. C0Gs also don't have any piezo-electric effect, nor does the dissipation factor increase (significantly) at higher frequencies like the PPS types do ... Other options could be polypropylene/teflon capacitors for the 10 & 100 pF types if size is of less importance. Might you have some experiences here?
Also, with respect to the resistors used ... You may be aware of the distortion measurements made by Ed Simon (?) and Demian (if I remember correctly) on various resistor types where he e.g. found that the distortion drops by 6 dBs when the resistor's wattage is doubled. To this end: Would it make sense to use e.g. 3206 resistors instead of 0805 types (inductance may increase just slightly)?
3. And then a question on your PCB layout for the oscillator - with reference to this link & the layout at the bottom of the page:
https://www.by-rutgers.nl/rutgerS-Clock.html
Are there any particular considerations to observe when laying out the board? I'm particularly thinking about the placement of the components in the left part of the schematic i.e. up to the 10 pF ("Ck") leading towards the 74HC04 ... It looks as if there could be some deliberate spacing between some components ...
I also assume the black part of your layout is without a ground layer?
Cheers & thanks for any insights you may be able to share on this ;-)
Jesper
I have a couple of questions, though, that I hope you may help answering:
1. Just before the 74HC04 in the "rutgerS'Clock" schematic on p. 6 there's a voltage divider consisting of two 22k resistors and a 1 uF capacitor. Assuming that one is within the passband of the 10uF//100nF decoupling capacitors of the 6.5 VDC supply then the cut-off frequency of the two 22k & 1 uF capacitor will be ~14 Hz (22k//22k). Won't this cause some LF instability of the oscillator, i.e. exactly in the frequency range where the oscillator should be stable? To this end: Would it be an idea to increase the 1 uF to e.g. 100 uF and thus lower the cut-off point?
2. This is a more general question ... What types of components do you use for the key components? E.g. Samuel Groner has made measurements on various capacitors and (to my memory) found that C0G capacitors have very low distortion and >100 VDC types were preferred. C0Gs also don't have any piezo-electric effect, nor does the dissipation factor increase (significantly) at higher frequencies like the PPS types do ... Other options could be polypropylene/teflon capacitors for the 10 & 100 pF types if size is of less importance. Might you have some experiences here?
Also, with respect to the resistors used ... You may be aware of the distortion measurements made by Ed Simon (?) and Demian (if I remember correctly) on various resistor types where he e.g. found that the distortion drops by 6 dBs when the resistor's wattage is doubled. To this end: Would it make sense to use e.g. 3206 resistors instead of 0805 types (inductance may increase just slightly)?
3. And then a question on your PCB layout for the oscillator - with reference to this link & the layout at the bottom of the page:
https://www.by-rutgers.nl/rutgerS-Clock.html
Are there any particular considerations to observe when laying out the board? I'm particularly thinking about the placement of the components in the left part of the schematic i.e. up to the 10 pF ("Ck") leading towards the 74HC04 ... It looks as if there could be some deliberate spacing between some components ...
I also assume the black part of your layout is without a ground layer?
Cheers & thanks for any insights you may be able to share on this ;-)
Jesper
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