CFA Topology Audio Amplifiers

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#1,661
[PS -- A spec being given for a 100W/8 power amp (1KHz); It is given for the new and soon to be released BenchMark brand product ----> .0001x % thd+ n. Obviously, this isn't a SIMulated number... a finished product. Curious what the topology is... VFA or CFA or ?? Of course, the numbers could be a lot worse at 20Khz - full specs not yet given. But benchmark has a reputation in their ADC/DAC equipment as being extreamly low with the numbers... So, you have your work cut out for you as the bar keeps getting raised.]

Thx-RNMarsh
 
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#1,662
Esperado said:
Petr1951, i don't understand: What the hell ?
What happens with simulators, or at least LTPspice ? Is- it anything we can rely on ?
I begin to just hate those programs, so badly coded, with a so unfriendly user interfaces, incomplete GUI, no serious debug help etc.
Anyway, it is not my way to design: Schematic, calcul, build, modify and listen, listen listen.

So, if any problem with my file (attached) please, can-you explain ?
The currents in this sim are: 1.7mA in the input stage, 1.4mA in the second, 5mA in the driver (not enough), 150mA in the OPS.
Click to expand...

Esperado,

I'm sorry you are becoming frustrated by LTspice. This is a very good simulator and it is free. I have not found it difficult to work with. However, all SPICE simulators are on a rare occasion confused by certain things in a circuit or in a model; but I find this rare. At times, when this has happened to me, I find that I have connected something really wrong in a bizarre way.

If you think it is models, put some other models in place of the devices. Then it should work, even if the models are a bit different from the transistors you are using. Use my models on my web page or someone else's.

I have found simulation to be really, really valuable in the design process, and it uncovers many dumb things that I do. While it is true that simulation will not always match real-world results, and is no substitute for building and measuring, it is a valuable tool.

Cheers,
Bob
 
#1,663
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#1,664
Bob Cordell said:
Esperado,
I'm sorry you are becoming frustrated by LTspice. This is a very good simulator and it is free.
Click to expand...
Thanks a lot for your nice care, Bob.
The thing is i'm a newbie with this tool, and the first time i published a schematic, (working damn good in real life) i was fired that my schematic was not working. And you know how some people are gentle over here ;-)
Several people had done this DIY, and, were fully satisfied, while few of them had some stability problems (expected and easy to cure).

The second thing is the user-interface. Not finished on my taste. Half a command line tool.
Why don't we have a graphic tool to import and export models, switch them from the GUI etc ?
Why not a simple square wave generator like the sin ?
Why can't we change the frequencies in transients measurements *from the user interface*, having a generator and an oscillo ? All this is so easy to code.

Why all models are not available from a unique location and updated by the community ? (Linux like).
And there is a lot of things i'm never sure about: Are my models used as expected, whatever the asc file location, when multiple models, witch one is used etc... LtSpice do its things silent.
If my models in a separate file, why don't they appear in the components list when you want to past one of them in the schematic ?
As a developer (it was a part of my life), i would consider LTSpice as in beta 1 state.

Anyway, i just believe in what i really measure and listen in real life, with all the requested respect to my friend Murphy, always on my side.
Well, i think i have to adapt myself, and learn. And take care to stay on topic ;-)
 
#1,666
Petr, it is exactly the same than in #1661, apart the 15V zeners, removed on the last schematic just to make-it clear (it don't change results) .
I was really upset by your first results. Full of questions.
This said, it is just inspired from VSSA, means a very precise piece of cake: any little change can increase distortion to more than one digit.
This schematic was just, in my purpose, a rock'n roll prof of concept, less than half an hour on it. Too litle stability margin, need to be carefully tuned for real build. Increasing the feedback impedance, trying to not kill distortion numbers ?

One thing i like is the isolation offered by the first emitter follower and the only 3 stages in the loop.
 
#1,667
Esperado !
the first and second stages operate together as a current mirror only in the event that the emitters of the same resistors. In the first embodiment in the schema does not have emitter resistors and transistors of the first signal was taken directly to the emitters of the first transistors. In this case the operation of the current mirror is disturbed and second transistors operate as a current mirror scale. Please note that all reflectors current contain in circuits emitter resistors of 47 ohms or more , it reduces the influence of scattering parameters of the transistors . Try to make the current mirror and remove one of the transistors emitter resistor . You'll see how to work scheme violated . So in your first option.
regards
Petr
 
#1,668
Petr, don't think too complicated 🙂
Look at it in a voltage point of view.
Q13 &Q14 are just voltage amplifiers with voltage gain fixed by 470 ohms in collector and 23.5 Ohm in emitters. And lower the impedance seen by the VAS for free. Exactly like in VSSA. The current part in the VAS base can be neglected (< 50µV ?)
Getting their emitters at ground DC, to get rid of any cap in feedback, their base voltages will be at an offset fixed by their base-emitter diode. The first transistors Q7, Q10 act in inverse to bring back the input offset to ground level. And provide current gain for free as well.
You can just consider their Q5+Q6, Q8+Q9 current sources as adaptive emitter impedances to make the emitter current independent from the input source impedance, that we can adjust to cancel the overall output offset.
That you can replace with some resistance (i believe something around 220Ohms ? ).
 
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#1,673
bimo said:
Acording to LC, diamond buffer on input sound worse. Of course it is not about THD, at least in simulation. I want to know why?

I modified Bonsai's schematic. (Don't laugh!). I think it is OK, using cap on input. But I do not know about DC offset stability and if this compensation is correct or not.
Click to expand...

No comment about my schematic? Is it too stupid?
According to my LTSpice, THD at 20kHZ, 23,7Vp 8Ohm = 0.001913%
 
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#1,674
Esperado and others, you have added COMPLEXITY. The circuit I posted up has six transistors and no decoupling caps for the feedback network or bias networks.

With these low component count designs, don't expect stirling distortion performance. However on bandwidth and SR they are very good.
 
#1,675
One suggestion.

Add a transistor pair on the R3, R5 and R4,R6 to stabelize standing current the VAS stage. BC847DS and BC857DS This will form an modified wilson current mirror.

This is only 4 transistors more, but would keep the bias circuit simple (resistor and CAP R19, C3).

Change Mosfets to LFET from Semelab. The have selfcontrolled bias with an constant vgs voltage.

Add gatestoppers too.
 
#1,676
Esperado said:
Q13 &Q14 are just voltage amplifiers with voltage gain fixed by 470 ohms in collector and 23.5 Ohm in emitters. And lower the impedance seen by the VAS for free. Exactly like in VSSA. The current part in the VAS base can be neglected (< 50µV ?)
Click to expand...

Considering the negative branch, the hfe of Q18 (2SC3503C) is between 40 & 80.
( http://www.cordellaudio.com/book/datasheets/KSC3503.pdf )
With a quiescent current of 5.6 mA, the base current is at least 70 µA (not µV...). The input impedance at the base of Q18 should be around 350 Ohm and is not very linear. Being in parallel with the R4 (470 Ohm), the voltage gain of this transistor is not defined solely by 470/23.5.

Getting their emitters at ground DC, to get rid of any cap in feedback, their base voltages will be at an offset fixed by their base-emitter diode..
Click to expand...
The schematics would be more clear with the Q7 & Q13 set in the lower part and Q10 & Q14 in the upper part.

I have doubts about the DC stability of the circuit.
The input stage is nothing else than a diamond input stage circuit but with the usual resistors defining the bias in the inverting input transistors (Q13 & Q14) omitted.
 
#1,677
Bonsai said:
Esperado and others, you have added COMPLEXITY.
Click to expand...
I don't see-it that way. I don't care about the complexity around the loop, like regulation of rails, CCS, or my first emitter follower, as long as they don't add any pole in the closed loop. I believe my version is still very fast and low enough HD. (<0.0006 at1kHz 50W).
I will compare with your as soon i'll get some time for it.

bimo said:
No comment about my schematic? Is it too stupid?
Click to expand...
No, Bimo. Just we are looking for DC coupled ideas, at this time.
Petr1951 said:
Petr
Click to expand...
Yes, Petr, i had understood your diamond buffer point. The pro is better DC behavior. The con is we loose some AC gain in the first transistor with the 47Ohms+css AC attenuation. so little increased distortion, variable with trans GM and sonic influence of the 47 Ohm. Are the pro > than the cons ? We should try-it in real world with our ears.

Well, adding to my last schematic a Schottky to the second input stage collector move the VAS bias point in a nice way. Enough to give margin for VAS current up to 100mA, and/or VAS emitter degeneration. Time now, to play with this and currents to optimize at the best. With the actual values, my lying cartoon designer tells me 0.000547% with 11mA in the VAS and 22 ohms of VAS degeneration.
I like-it that way, and i believe it will sound as good as the VSSA with better basses. What about thermal drift without servo ?
The pro is very healthy bandwidth and nicer little signal square waves, more stability margin with less comp. The cons is little added HD.
 

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#1,678
Esperado, I'm glad you understand the work the equivalent of the current mirror transistors of different conductivity. Through diodes and resistors in the emitter of the second transistor stage is now working as a large-scale current mirror. Thermal stability is also significantly higher. With regard to the servo, the voltage drift will depend on whether in the same temperature conditions are opposite transistors circuit
regards
Petr
 
#1,679
Petr1951 said:
Esperado, I'm glad you understand the work the equivalent of the current mirror transistors of different conductivity.
Click to expand...
We have a proverb for this, in French: "Connu comme le loup blanc".
In fact, i only worry about offset variations. Variations due to temp will only have an influence in VAS bias, as the OPS bias is set by a TLVH431 voltage source, very stable vs temp and laterals have a negative behavior.
Attached, a version with your suggestion:
75W HD: 0.000681%
50W HD: 0.000568% (Original version : 0.000742%)
50W 20kHz: 0.002714% (Original version, 0.001257%)
Slew-rate > 1000µs

In the same conditions, original VSSA shows 0.01%hd at 20kHz.
 

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#1,680
I'd say we have made excellent progress on this thread.

Dadod has demonstrated some very high performance designs, both low distortion, and very high slew rates and bandwidth.

I think these latest iterations of yours Esperado, also give a flavour of the excellent performance CFA's are capabe of.

Hopefully, as we move forward, this topology will start to become more mainstream.
 
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