CFA Topology Audio Amplifiers

The use of the ccs doesnt change the topology, the resistors do the function of the ccs. Indeed the use of ccs improves PSRR but sadly doesnt do anything to improve THD. Study the SSA thread, two members there namely homemodder and Elvee seem to have the topololgy well studied and show sims proving this point. Elvee also shows via sims how cascoding is actually detrimental to THD.

In the presented circuits including CCSs, the main purpose it to better define the quiescent currents, I think.
 
What early effect, perhaps you havent noticed that the gain devices are bootstrapped. PSRR is a little bettered, sims show. The cascodes increase the impedance at the summing node which should be as low as possible as theory suggests, hence a slight increase in THD. Even the use of hawksford type cascodes doesnt improve matters and could potentially make them worse. For those not using bootstrap it may be required for the use of low voltage transistors. Bootstrapping also doesnt bring significant improvement in THD as the Vce of the summing node transistors is lowered and results in higher capacitance between base collector which means higher THD at high frequencies although the reduction in early effect depending on the transistors used, improve matters marginally at frequencies below 1Khz thereabout.
In the actual amp low rb rf transistors are used for the diamond buffer for low noise and lowest high frequency THD, this to keep a uniform THD pattern from 20 hz to 20Khz. These transistors have very low Cob figures although in detriment of input impedance because of low Hfe, a slightly lower impedance can be tolerated. Matching and hfe selection is a nightmare but possible.

Nonsense and technobabble, designed to impress the n00bs. You didn't even care to post a schematic that is intelligible/readable.

I'm not going to enter into a debate and wonder what has bootstrapping to do with the Early effect, which summing node are you talking about, since when rb (the bipolar base resistance) has anything to do with high frequency distortions, what do you mean by "device input impedance" and why does it go inversely with the Cob, why where and which devices are to be matched, etc...

Me back to lurking mode, feel free to follow your agenda, whatever that is.
 
Nonsense and technobabble, designed to impress the n00bs. You didn't even care to post a schematic that is intelligible/readable.

I'm not going to enter into a debate and wonder what has bootstrapping to do with the Early effect, which summing node are you talking about, since when rb (the bipolar base resistance) has anything to do with high frequency distortions, what do you mean by "device input impedance" and why does it go inversely with the Cob, why where and which devices are to be matched, etc...

Me back to lurking mode, feel free to follow your agenda, whatever that is.

I didnt need to, Wahab did that and confirmed the workings and THD or did you miss that.

It shows how inexperienced you are, if you dont realize that bootstraping eliminates the early effect.
Rb doesnt have anything to do with THD and I made no such claim It does however affect noise, dont misrepresent posts
Once again where did I say device input impedance, I just said input impedance, everyone knows what input impedance of a amp is, again misrepresentation, are you 10 years old or just a grumpy nerd behind a desk with no wife or girlfriend and this is the way you get your kicks.
 
At least in sims the CCS on the front end of the diamond input showed no change in THD for a plain resistor vs CCS.

At least on a cost basis there is no reason not to use CCSs in these positions.

True, it does not improve matters THD wise with the design that Kgrlee showed either. Instead of ccs you can use bootstrapping which is what is used on the design I showed although not included as it doesnt affect THD or stability. The ccs or bootstrapping merely there for improvement of PSRR.

Have you managed to tame the oscillation yet ??
 
Have you managed to tame the oscillation yet ??

Yes, its very stable now. The stability is all down to getting the shunt compensation on the TIS/VAS output right. Also, found where I was going wrong with the feedback cap. It was pushing the ULGF too high.

Almost finished the second channel just got to drill the test heat sink and connect up.

Cheers

Paul
 
Instead of ccs you can use bootstrapping which is what is used on the design I showed although not included as it doesnt affect THD or stability.

I did try bootstrapping the CCSs and again no change in THD in sims.

Maybe it was a stupid experiment but it showed the same results. The bootstrapping of the input stage with CCSs seemed a pointless exercise and was dumped as it made PCB layout awkward.
 
CCS vs resistor feed from Zener regs to front end buffers has zero effect on system THD.

I also fail to see the connections between THD and the use of cascodes other than sim anomalies in a classic CFA topology amp if you are using decent low Cob devices.

I would use cascodes because it allows me to use lower Vce devices with high hFE.

I have tried matching BC547 and 557 C types and got fantastic results. 2mV and hFE to within 10% at c. 500 is easy, and tighter matching of hFE to 5% is no too difficult ( results from batch of 100 Fairchild devices).
 
If you are using c. 30 MHz BIP output devices and closing your loop at anything much above 3 MHz, you are likely to get oscillation probs, and especially so if you have any kind of capacitive load. I think even 3 MHz may be pushing it a bit. FET and you may be ok.
 
Do we understand how to design a good CMA yet? Why compare if we dont have an acceptable CMA design that is understood?

There are some 1% that might understand but the 99%'ers?

I guess the rush to a design means a certain critical mass has come together and accept there is such a thing as a CMA operation? And, that it might have some merit somewhere, somehow. lets build somthing and see?

Is that what is going on ... or have the cats invaded the place and are running all over the place (again)?

-RNM
I am a 99%er
 
No Jan, i did get it.

And it make sense, and i do it myself. But instead on focus on the optimum VAS and Frontend into a perfect buffer, i would not reject any of them before i have tested with a output stage with load.

The "perfect buffer" is a perfect load for the previous stage. It is true that you can get really close with and linestage with an good buffer.

But as you go up in power level devices in the output stage gets more and more unlinear and the loading of the vas stage gets a more unlinear and complex load.

You could easily end up with an less perfect VAS stage performing better.

- Sonny

Yea you got a point there too.

jan
 
Comparing to VFA - which one?

For those who have a burning desire to compare your VFA to the final chosen CFA circuit here .... hopefully finding the strengths of each along the way as the IC industry has ---

The design to compare to is the one that Scott Wurcer has done on another forum in DIYAudio. It uses all descrete parts readily obtainable. I dubbed it the SWOPA design. Search for it. Thats your bench mark as far as i am concerned. Anything else just wont be competitive enough.

Note to... the SIM is Ok but until the circuit is built and tested it is just a SIM dream. As often happens, the actaul 'as-built' circuit isnt as good as the SIM. So, I put a few pages back the opposite situation with SIM -- one in which a SIM would say it is bad but the actual 'as-built' was way, way better [due to device selection/matching characteristics]. So, the actual circuit's results must be compared to a working model and measured. Then compare.

Thx-RNMarsh
 
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If you are using c. 30 MHz BIP output devices and closing your loop at anything much above 3 MHz, you are likely to get oscillation probs, and especially so if you have any kind of capacitive load. I think even 3 MHz may be pushing it a bit. FET and you may be ok.

Exactly, that.

I'm running at 3MHz ULGF. Anything much higher and it did oscillate. Using L-Fet outputs.

It was the discussion on ULGF earlier in this thread that got me thinking.
 
I would use cascodes because it allows me to use lower Vce devices with high hFE.


Another possible reason for cascoding the front end diamond is to give the active devices consistent operating conditions. For example, consistent Vce.

Edit: Currently running without an inductor into the naff KEF coda 7s and no problems so far. Once I build into the case it will definitely have anoutput inductor.
 
The use of the ccs doesnt change the topology, the resistors do the function of the ccs. Indeed the use of ccs improves PSRR but sadly doesnt do anything to improve THD. Study the SSA thread, two members there namely homemodder and Elvee seem to have the topololgy well studied and show sims proving this point. Elvee also shows via sims how cascoding is actually detrimental to THD.

That is not enterily true. If you have a good diamond buffer at the input you will see a small improvement. But a good PSRR is essential for good performance.

With an low PSRR you will end up with modulation of psu rails by the output stage will be feed into the frontend. Do you want this?, just to make the design simpler? I will not.
 
Rb doesnt have anything to do with THD and I made no such claim It does however affect noise, dont misrepresent posts.

:Pinoc:

In the actual amp low rb rf transistors are used for the diamond buffer for low noise and lowest high frequency THD, this to keep a uniform THD pattern from 20 hz to 20Khz.

Once again where did I say device input impedance, I just said input impedance, everyone knows what input impedance of a amp is, again misrepresentation

:Pinoc:

These transistors have very low Cob figures although in detriment of input impedance because of low Hfe, a slightly lower impedance can be tolerated.
 
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Draw yourself a cascode stage and look closely. The cascoded device is usually a low Vce device with high beta and low Early voltage. It would not support the collector voltage, and the distortions would be rather high (because of the low Early voltage which is, BTW, rather frequency independent).

The cascoding device is a high voltage, high Early voltage, but with rather low Beta, device (remember that the Beta*Early voltage is a process dependent constant, kinda "process figure of merit"; you can't have the cake and eat it too, that is both high Early voltage and high Beta).

The cascoding device keeps the cascoded device Vce constant within the datasheet limits, and obviously the Early effects are tamed. The large voltage excursion is now moved to the cascoding device collector, but as this one has large Early voltage, the distortions are lowered.

Shortly, a cascode stage is is in fact building an optimized device, with both high beta and large Early voltage, by taking the best out of two classes of devices. If you are using modern devices like the KSA1381/KSC3503 which are both high voltage and very high Early voltage, using a cascode is pretty much moot.


I know all this but now take a non cascoded VAS using a given
device , say a BC546 for instance , check the OLG of your
amp and then cascode said VAS using also a BC546 as
common base device , gain will increase substancialy
even if there s about the same early voltage for
the common base device as for the single non cascoded
common emitter.

This say that it s not only the emitter/collector residual resistance
that is at work for gain limitation of the single device VAS but
also the collector/base parasistic resistance , r.mu , wich can
also be the limiting factor of a cascode output resistance
if ever it s smaller than the collector/emitter resistance.

Regarding PSRR, look at the effect of PS variations at the output. There isn't any difference from a usual common emitter gain stage. Actually the overall cascode stage gain is the same as the common emitter stage of the cascoded device, in the cascoding device load.

Using the exemple above of two same devices to implement
a cascode , PSRR is improved by 6dB when cascoding the VAS.