CFA Topology Audio Amplifiers

Disagreeing doesn't make your statement right 😛. Take a look at the typical schematic posted here.

The first observation is that in this case the second gain stage is not necessary a TIS, since the input impedance of the emitter follower is much higher than the output impedance of the input stage (R3/2). So the open loop input stage voltage gain is essentially (R3/2)/(R8/2+R21||R33). R33 is the feedback resistor and, as you can easily see, the gain modulation by the feedback resistor happens through the R21||R33 (this is the RF/RG term in my previous post). Because of the large closed loop gain, 18ohm||560ohm doesn't make much of a difference, hence the "CFA" effects are largely diminished, in the 2-5% limits I already mentioned.

Again, this is about the input stage topology (LTP vs. diamond buffer, etc...) rather than any CFA effects which are essentially diminished by the large closed loop gains required for a power amp.

Changing the feedback resistor changes the gm, whether its 2-5 % or some other value, right?

Your observation is correct where the CFA loop gain is high, but it does not hold for cases where the loop gain bandwidth is very wide. Two good examples are the recent designs I published on the forum. The sx has a loop bandwidth of c. 50 kHz and he nx-Amp about 10kHz IIRC.

Secondly, you are basing your observation on a large closed loop gain - what happens at other gain settings?
 
Last edited:
Manso's simple CFA with good performance?

Manso, referring to what Wahab thinks is your circuit in #478 ..

Can you explain the need for R36/37 & R8/14 in your CFA amp? I know they provide emitter degeneration but in a CFA, the 'feedback resistor' R21 already provides degeneration.

Or is this a peculiarity of Diamond i/ps? Bonsai?

I have a sneaking suspicion they set the current for the i/p devices.
 
No, I am not finding that additional shunt comp is needed in sims, or in practice (sx and nx amps). The 1 pF you see for the shunt cap in the circuit I posted is a place holder. I did some sims yesterday on this very issue, and will stick with Alex comp in my designs for now, in addition of course to exploring other comp options.

Can't access your site at present. Do your amps use "enhanced VAS"?

This CFA compensation stuff is what's really interesting me at present.
 
Secondly, you are basing your observation on a large closed loop gain - what happens at other gain settings?

I've already mentioned that the "CFA" behaviour in these topologies is largely diminished by the high closed loop gain (as usual in audio power amps, where closed loop gains are 20-26dB or higher). Definitely, at lower closed loop gain, this topology behaves as a textbook CFA. The lower the closed loop gain, the lower the feedback resistor, the lower the stability and the lower the tolerance to any capacitance at the inverting input. Hence, less tolerance for any capacitance at the inverting input (including a lead compensation cap).
 
You need to run the cap from the TIS output back to the feedback summing junction.

Start off by doing straight shunt comp, once it's stable, then change it to Alex comp. You can reduce the value of th cap substantially ( usually half the shunt comp value) and get the same BW performance - however, your PM and slew rate will be much better
 
This is my CFA offering. It started of as something for Dave Zan .. then I realised that JLH had several designs of almost identical topology. LC's VSSA is also very similar.

Bring it up to this century... push-pull the input and direct couple it - get rid of the C3 and C4. Might try more linear output stage -- Szikai output stage. Then, for fun compare with jFET compl/push-pull input stage.

Thx-RNMarsh
 
Last edited:
This is my CFA offering. [...]

An interesting detail of your offering is that the quiescent current through the transistors to which feedback is applied is defined by a Contant Current Source, just as it is the case for Long Tail Pairs of a VFA. Subsequently the operating conditions of the whole circuit are well defined, despite the fact that at very low frequencies, there is no open loop gain obtained from the Input Stage.

In the CFA diamond circuit, the current through the transistors receiving feedback depends of a biasing network placed ahead of their base. Then the operating conditions may be less dependable and each circuit may ask for checking of the current through every active device.
 
Why do you guys not use a perfect buffer as the output stage, so you eliminate all output stage issues from the comparison? Also use ideal batteries for supply.
Then you can try to compare the various schemes more cleanly. If you then want to check differences in PSRR you can use simulated supplies with some additional ac component and look how that propagates to the output.
I see lots of sim hours being burned here with nobody really doing a sensible comparison.

jan
 
Do we understand how to design a good CMA yet? Why compare if we dont have an acceptable CMA design that is understood?

There are some 1% that might understand but the 99%'ers?

I guess the rush to a design means a certain critical mass has come together and accept there is such a thing as a CMA operation? And, that it might have some merit somewhere, somehow. lets build somthing and see?

Is that what is going on ... or have the cats invaded the place and are running all over the place (again)?

-RNM
 
Richard,
My basic understanding without any other details is that the cfa is a current controlled amplifier and the vfa is a voltage controlled amplifier. Now the topology of the two seem to have many instances where they can be nearly identical in topology and function outside of those two distinctions. From the 99%
 
Why do you guys not use a perfect buffer as the output stage, so you eliminate all output stage issues from the comparison? Also use ideal batteries for supply.
Then you can try to compare the various schemes more cleanly. If you then want to check differences in PSRR you can use simulated supplies with some additional ac component and look how that propagates to the output.
I see lots of sim hours being burned here with nobody really doing a sensible comparison.

jan

A perfect simulated circuit needs a tightly controlled layout.

It is just as demanding to layout a highspeed amp as to make an rf layout.

But start with an simplified layout of an cfa and then concentrate on improving one stage at a time.

It takes several layout trials to implement a simed circuit.

Real world is far away from the simed world.

I suggest : go look at the alexander amp published by analog devices. And look on the simplified schematic of the ad846 and ad844. That is a good starting point. .... Trust me!!
 
I see lots of sim hours being burned here with nobody really doing a sensible comparison.

Actually for going through the simple diamond input stage, there's little to nothing required to simulate. It is enough to note that, due to symmetry, one can fold the bottom and the upper halves, halve the resistors and double the transistors gm. What you always get is a emitter follower->common emitter structure which can be quickly analyzed by simple inspection. The input emitter follower has large bandwidth and no voltage gain, while the common emitter gain stage has the gain determined by the emitter and collector resistors ratio (a cascode has no role in the gain, but only to tame the Early voltage effects, exactly like in a differential LTP). The CFA effect is (as much as allowed by the closed loop gain) determined at least by the feedback resistor in parallel with the emitter resistor.

Ignoring for the moment the emitter resistor, the bandwidth of a common emitter gain stage is determined by the pole Cin*Rg where Cin is the combined effect of the Cbe and Cob reflected at the input through the Miller effect/theorem, that is Cob(1+gm*Rl), and Rg is the source impedance. As the previous stage is a emitter follower, Rg is it's very small output impedance. We already got the feeling that this kind of setup will be high bandwidth (since Rg is very small). Compare to the VFA LTP, where lacking the input emitter follower, the bandwidth will be much lower.

Now back to the emitter resistor, it's effect may be considered in at least three way: brute force algebra (a nightmare), feedback theory (series-series feedback) - and it is obvious that Re trades gain for bandwidth (although still not easy to evaluate quantitatively) and finally the OCTC (Open Circuit Time Constants) method. Google is your friend here, I'll mention only the result of such an analysis. For a degenerated common emitter circuit, and for all practical conditions, the GBW product principle applies. So increasing the emitter resistor Re increases the bandwidth as much as it decreases the gain. Hence, the CFA effect is determined *only* by the feedback resistor Rf in parallel with the emitter resistor Re. Get the formulae from a Google search, plug in the datasheet and circuit numbers and you'll get the diamond buffer bandwidth, which is for sure much larger than anything you can get from a VFA with it's LTP. Again, this is due to the emitter follower buffer at the input that provides a very low output impedance (that is, source impedance) for the common emitter gain stage.

Another obvious thing you may note after folding the up/down halves is that the inverting input (in the gain stage emitter) is also very low. It's essentially Re/(1+gm*Re). Again the "CFA" effect lowers this impedance because RF (the feedback resistor) loads in parallel with Re. It is now clear the central role that this emitter resistor has, in determining the gain, bandwidth, and inverting input impedance. If you add to the list the linearizing effect of any emitter degeneration, you may consider such a workload for a little resistor rather excessive. I personally don't like putting all my eggs in the same basket, YMMV.

And that's about the "magic" (considered by some) diamond input stage small signal properties. Compare the above with the LTP, where large signal effects (even harmonics cancellation, tanh distortion mechanism in differential stages, etc...) can't be analyzed other than by simulation. So another conclusion is that the diamond input stage is much simpler (and has less device parameter (other than Cob) and matching sensitivity), which is obviously an advantage. But you can also view this as the LTP differential input stage having linearizing mechanisms that are not available in the diamond input stage, so pick your poison 🙂.

When I'll have some time I'll post something about the large signal properties (that is, the "current on demand" property, allowing very large slew rates). Good night for now.
 
I plead ignorance, somebody please come up with an example of commercial audio power amp having 8MHz ULGF.

7-8MHz ULGF (and in particular for a bipolar output stage) is way to high to be of any practical importance.

If it can be done why not, of pratical importance or not, you gain a little THD reduction at high frequencies.

Cyrus range of amps which are mostly CFAs all have ULGF of 4 MHZ and above.
 
This is my CFA offering. It started of as something for Dave Zan .. then I realised that JLH had several designs of almost identical topology. LC's VSSA is also very similar.

  • I haven't used VSSA cos proper THD analysis needs EKV MOSFET models (hint hint grovel grovel Guru Cordell) The DC design is VSSA with FET CCSs on the i/p. I'm not sure how to sensibly tweak them in production .. or even for a one off.
  • V4 & 5 are just to charge C3 & 4 for the THD analyser to work easily.
  • C1 & 2 would be large in 'real life'
  • The design has very low i/p noise, basically just R12=14R if the transistors are good. But for Dave Zan's supa LN application, it should only 2.555x gain rather than 17.67x as here. R12=39R R18=110 for Dave Zan's treble amp
  • It uses 11 devices.
CFA2-20kHz.gif shows 2 cycles of 20kHz at a level of 0.01% THD to give some idea of scale for the red THD residual.

I've not fully looked at this in SPICE world and more importantly, have never burnt solder on anything similar.

In fact it was JLH that first used this topology back in the 1960s. There are some commercial offerings using this topology. There was a whole range of amps by a german manufacturer back in the 80s. These amps were highly regarded and won some awards if that is worth of mentioning. Ive also schematics where this topolgy was used in sound re enforment amps, very high power.

You should add another 2 transistors, use of beta enhanced vas can drop THD levels to 10 ppm.
 
Bring it up to this century... push-pull the input and direct couple it - get rid of the C3 and C4. Might try more linear output stage -- Szikai output stage. Then, for fun compare with jFET compl/push-pull input stage.
The input is already push-pull. Using jFETs on the i/p would get rid of C3 & 4 and DC couple it but needs stuff from the Unobtainium FET Co. It is likely that the i/p devices would need cascoding .. which would use up my 2 extra devices .. and more from the Unobtainium FET Co.

I chose this topology cos important aspects are tried & tested. eg the DC of the i/p stage is pure VSSA. I HATE extrapolating. Interpolating is OK.

CFP output stages don't have as nice a THD profile as EF2 at low level. eg Fig 5.39 & 5.40 in the Output Stage I chapter of Self's book 4th ed. Can someone who has bought the new 6th ed. please tell us if he managed to do some more 'real life' work on this.
________________

Anyone have advice on how to use my 2 extra devices compared to the simple Blameless11 VFA ? So far, my HO is that triples are the least evil of several options.
________________
jan.didden said:
Why do you guys not use a perfect buffer as the output stage, so you eliminate all output stage issues from the comparison? Also use ideal batteries for supply.
Jan, my personal metric is the best I can do given the resources & target. In this case, its a small 50W 8R which I have loadsa 'real life' with different topologies in the course of designing a production amp. Blameless11, which I posted in #502 uses 13 devices.

My eyes will glaze over if any 50W amp exceeds 16 devices as I can already get sub 1ppm THD and other good stuff with Blameless6 in #499 (at least in SPICE world)

As these are sims, I'm already using 'ideal batteries' but I think the complexity of the FET CCS is warranted as they would be essential for good PSR in 'real life'.

I have to put in a real o/p stage cos my simple Blameless11 VFA and my CFA2 are quite different. The VFA input has single ended output while the symmetrical CFA has 2 paths. This limits the type of compensation that can be used. It's one reason for my usual aversion to symmetrical amps cos compensating 2 forward paths may introduce even harmonics and makes more difficult clever stuff like 'pure Cherry'.

My CFA2 has several advantages over the Blameless11 VFA. One of them is the VAS is push-pull so is doubly effective.

All these reasons mandate a 'real' o/p stage is simmed to force us to deal with 'real life' issues.

But it may be that the biggest advantage is simplicity and <0.01% THD is more than good enough. It would certainly have been considered excellent in 1980.
________________

BTW, Alexander comp. is just MIC by another name. In da old days, I called it JLH comp. JLH used & described it in the late 60's for CFA style amps and also in his 1972 HFN&RR 75W/channel VFA amp. Cherry mentions it as not having much advantage over simple Miller for stability but misses the less stringent load on the IPS which usually allows higher slew.
 
Kgrlee wrote "BTW, Alexander comp. is just MIC by another name. In da old days, I called it JLH comp. JLH used & described it in the late 60's for CFA style amps and also in his 1972 HFN&RR 75W/channel VFA amp. Cherry mentions it as not having much advantage over simple Miller for stability but misses the less stringent load on the IPS which usually allows higher slew."

Kevin, I avoided calling it MIC because I don't think in the detail it works quite the same as it does in a VFA. Alexander does the derivation in the back of his app note.

You still aim for a dominant pole at LF with MIC in an VFA, whereas in a CFA, due to the lower loop gains, the pole is usually set at a much higher frequency.

However, I am open to correction . . . Until then, I prefer to call it Alexander comp.