Tried the R100s today, pretty spiffy !
Same schem as before, biased at 1.6a. Lower end distortion spectra is pretty, nice and tidy. Thd at higher output power is MUCH lower - now with 24v rails, 100w rms into 6.8r gives us .24% ...... in case that sort of thing matters.... looking at and listening to, distortion residuals seems to suggest things do start to look less nice once you leave class A.. Just a matter of a little or a lot of yuckiness depending on nfb levels...
Have a great w/end chaps ....
Same schem as before, biased at 1.6a. Lower end distortion spectra is pretty, nice and tidy. Thd at higher output power is MUCH lower - now with 24v rails, 100w rms into 6.8r gives us .24% ...... in case that sort of thing matters.... looking at and listening to, distortion residuals seems to suggest things do start to look less nice once you leave class A.. Just a matter of a little or a lot of yuckiness depending on nfb levels...
Have a great w/end chaps ....
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This is Figure 3 of Typical Characteristics in TI's Data Book. Below an In-Out 10 V differential, the shown current is ~0.3 A [30 ms pulse] and falling off rapidly. Clearly, there is not enough voltage for its internal error correction unit to work. Unfortunately, this demands the use of an independent positive rail which is higher in voltage than is used for the output stage of the amplifier! A +50 V [independent] to the -25V rail of the output will leave behind 25 V differential for a positive output signal to the +ve rail. At this differential In-out voltage, Figure 3 shows a 1A capability. This proposed solution is possible; but is getting to be more complicated [more parts].
The use of any other type of CCS [regardless] will also be afflicted by the need for an independent higher positve voltage rail. It too needs a minimum in-out voltage differential to work properly.
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you mean in upper part of BA1 FE ?
there is no biasing in OS itself
..... wakooyank
You know what I mean.
First signal tests of my F6
I finally decided to make the final connection from the input driver to the transformer primary (rather than a dummy resistive load) and run some tests on the amplifier.
Test conditions: 24 volt rails, 1.3A output FET bias, 8 ohm load.
First tests:
I will soon post the schematic and plots.
I finally decided to make the final connection from the input driver to the transformer primary (rather than a dummy resistive load) and run some tests on the amplifier.
Test conditions: 24 volt rails, 1.3A output FET bias, 8 ohm load.
First tests:
- 1kHz sine in, adjusted amplitude for 4 volts peak out.
- Output looks good
- 10kHz square wave in -- same amplitude.
- Output: no overshoot looks pretty clean, but obviously BW limited. Images to be posted later
- 1watt 1kHz .0094%
- 1watt 5kHz .046%
- 14watt 1kHz .067%
- 14watt 5kHz .208%
I will soon post the schematic and plots.
To soon to connect to any good speaker.
Here are some concerns:
Because of the capacitors in the bias circuits, there could be problems with turn-on-thump.
Currently my circuit has .12 ohm source resistors (Rs) and I am concerned about bias stability. The output offset voltage drifts considerably as the heatsink warms up. I am trying to keep the Rs low in value in order to maintain as much open loop gain (OLG) as possible without bias or thermal stability problems. As this point I have no idea of what value to use for Rs. Rs=.22 ohms is probably a lot safer, but will reduce OLG from about 60x to around 40x. That doesn't leave a lot for negative feedback.
The other reason for not listening, is that I will have a problem with evaluating the sound in mono. I am too conditioned to listening to my favourite recordings in stereo to be able judge my mono pseudo-F6.
You'll find a solution to manage the turn on thump. But; this behavior in your design may implicitly suggest the absence of capacitors in the final design of Mr. Pass. It will be intolerable as it may require an independent delay circuit using a mechanical relay to engage the loudspeaker. Complexity!
Is there a place in your circuit to use thermistors or diodes? I have attached OTLAmp1.pdf [from post #38] which discusses managing the underlined above with diodes. I have also seen other schematics like OTLAmp1 with thermistors instead in later posts. All the best.
Thanks for that "Designing OTL" pdf file. That is certainly a simple design, in the spirit of the Pass Principle. Where did you find that? Can you provide the remaining pages of the paper?
I need to do a simulation of it. I am not sure how well it does near the rails. The diodes across the emitter resistors are like in the F5 Turbo.
Please find attached. The designers of the schematic OTLAmp1 may have also asked the same bolded statement; but without today's benefit of LTSPICE in your hands.
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Hello buzzforb. I found the official BA #1 output stage in the article by Mr. Pass entitled Burning Amp Number Three. Please find attached a hand copy of what may be your underlined suggestion. Is it? I show the bias circuit for the upper and the different one for the lower MOSFETs. I inserted the secondary windings of the transformer where I saw possible. Can you or other answer the two questions regarding points A and B of the bias circuits.
You can't develop a bias voltage across the coils, so it will only work for
those cases where you can bias at Vgs=0, in which case you don't need
all that circuitry anyway.
😎
Correction: for depletion mode devices, the bias would be 0v between
the Gate and the other end of the Source resistor.
those cases where you can bias at Vgs=0, in which case you don't need
all that circuitry anyway.
😎
Correction: for depletion mode devices, the bias would be 0v between
the Gate and the other end of the Source resistor.
Thank you Mr. Pass. The dc resistance of the transformer's secondary is ~28 Ohms [previous post]. But suppose the same bias circuits are modified so as to supply ~45 mA each [past post] and generate the needed Vgs across the transformer's secondaries. This approach may be like that of lhquam who wanted to use CCSs.
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Actually the idea was proposed by tadek in this post: http://www.diyaudio.com/forums/pass-labs/216616-f6-amplifier-80.html#post3128183. I was just exploring the implications of that idea.
Nelson, Mayhave something up his sleeve, but i don't see getting away without a cap. THought about it all day. Only way i know is using CS, which ZM says is bad idea to load secondary( I tend to listen to him), or putting jfet after interstage and that's adding a stage. I wonder about a level shifter, but don't know much about them. ANyhoo, I dont know much,probably less than everybody else commenting, so I would follow their advice. As for BA1 bias scheme, I was just thinking in terms of simple Zener reference, but cap is still needed.
here we go again
maybe I'm rotten , knowing (at least partially) direction in which Papa is heading ......... but everything is already written
not best , not only , not sole possible way of doing things ........ but certainly most elegant and practical way of doing it
I'm probably most stubborn guy around , always trying to do things different from Pa's way of doing it ........ even if that means that my solution is always more complicated and less elegant ...... but this time - there is no sane way of doing it without cap in series with secondary
at least not with small signal xformer
maybe I'm rotten , knowing (at least partially) direction in which Papa is heading ......... but everything is already written
not best , not only , not sole possible way of doing things ........ but certainly most elegant and practical way of doing it
I'm probably most stubborn guy around , always trying to do things different from Pa's way of doing it ........ even if that means that my solution is always more complicated and less elegant ...... but this time - there is no sane way of doing it without cap in series with secondary
at least not with small signal xformer
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