After 45 years of faithful service, my amplifier, based on the Wireless World April 1975 circuit, was a little underpowered for the obtained Quad ESL's I was able to repair. Building a proven concept was the way to go as it was 40 years ago when I had something done with audio amps.
Simon, whom I worked with 45 years ago at Audioscript (importer of Luxman and Stax products), reacted on my question concerning ESL's and the Honey Badger.
Talking about the past brought back nostalgic audio design thoughts and I wondered what might be possible with modern tools. What was the full potential of that 1975 design when fully optimized? The class AB stages of today are not significantly different from those 50 years ago, most distortion generated in class AB amplifiers is still due to the output stage. That old circuit still might improve the distortion figures and I was wondering what was possible by using a simulator. Goal was to build an amplifier with the lowest possible harmonic distortion, purely out of academic interest and fun.
The use of MicroCap turned out to be of great value to stability- and low distortion-design possibilities, twiddling a circuit made so easy.
The results were better than expected, the optimized output circuit measured -95dB THD at 50W/8Ohm, so by applying overall feedback, THD values of -125dB or better were possible. Below, the distortion residue of the OPS at 50W/8Ohm, is shown. Quiescent current is 100mA.
With these figures the distortion limiting factor shifted from the power stage towards the front and a lower distortion LTP/VAS design was necessary.
That completely derailed into a 5 years amplifier- and distortion-analyzer- design -effort with the following results:
AMPLIFIER SPECIFICATIONS:
Gain: 29dB.
Power: 100W - 8Ohm, 200W - 4Ohm, 400W - 2Ohm.
Full power bandwidth: - 50kHz - 2Ohm.
Output impedance: - <1mOhm DC - 100kHz, in series with the 1uH output inductor.
Over-current protection: The momentary dissipation of the output transistors is restricted to 120W/transistor.
Distortion THD:
1kHz, 20V, 8 Ohm: -139dB. = analyzer limit
1kHz, 20V, 4 Ohm: -125dB.
10kHz, 20V, 8 Ohm: -120dB. = analyzer limit
10kHz, 20V, 4 Ohm: -111dB.
Due to power supply limitations testing with a 2Ohm load was not done, it is also not that relevant when using Quad ESL63’s.
1KHz, 100W, 4Ohm, THD = -125dB
10KHz, 100W, 4Ohm, THD = -111dB
Distortion measurements are made using the difference method, by subtracting the input signal from the attenuated output signal.
The analyzer has a residual distortion of -140dB at 1kHz and -122dB at 10kHz.
After nulling the distortion output with amplitude and phase potentiometers, the distortion- + oscillator-signals are fed into the PC by, for example, a Focusrite Scarlet and measured with REW-RTA. Since the distortion has been amplified by 1000X, 60dB must be subtracted from the measured distortion.
A disadvantage of this method is the noise added, the THD+N figures are useless. On the other hand, the residue visibility on the scope is of great help to deduce the source of distortion.
The 1975 circuit was made as an enhancement to the Quad triplets, I used earlier with the Hawk amplifier. The current through these triplets is abruptly cut off by the voltage developed across the output resistors, the reason being that those resistors are outside of the local feedback loop. The sudden change in impedance results in crossover distortion.
My solution was to place the bias voltage and the output resistors inside the local feedback loop by using a common input element, the emitter-coupled input-pair Q21/22.
This forces the current through these transistors and the 470Ohm resistors R56/59 to be equal and dependent on the voltage between the basis. This creates equal and out of phase input voltages for the upper and lower triplets Q23/25/27-29-31 and Q24/26/28-30-32.
The use of out of phase signals made it possible to use identical circuits for both triplets, this also reduces 2e harmonic distortion.
The result is an output stage with minor irregularities at the crossover point, vanishing with increasing bias current. There is no minimum, this eliminates thermal lag induced distortion. Due to the large feedback factor, the resulting output resistance is that low, that a wingspread figure is meaningless.
Bias adjustment:
The floating voltage across C25 moves with the output, which sets the current drawn by the lower triplet and forces the upper triplet to the same current.
There is a lot of voltage gain in series with the power transistors which means that the temperature has a huge impact on bias current via Q24. Because of that it was essential to keep all triplet transistors, including Q23/24, thermally coupled.
The temperature compensation of 10mV/degree C is provided by U3 - LM35 and buffered by Q20. Temperature variations in the base/emitter voltage of Q20 are compensated for by Q36.
The bias is adjusted with RV1 by altering the voltage over U2.
The spread is small enough to allow for a fixed bias.
The measurements were made with 100mA per output transistor, the distortion with low load resistances can be reduced by increasing the bias above 100mA/transistor.
Protection circuit:
The maximum dissipation of the MJL2194 is specified at 200W at 25 C, so the maximum instantaneous dissipation limit is set at 120W maximum to accommodate a temperature increase.
The current sensing resistors R68//72 and R70//74, combined with the circuitry around Q33 and Q34, facilitate the shorting of the Q23 and Q24 basis via D26/25, clipping the output signal in case the dissipation is reached.
This function works over the four quadrants of output power.
The layout needed special care to get those low distortion figures. For example, the 2W resistors, carrying large peak currents, are placed in such a way that their induced fields eliminate each other and the output trace is alongside the return trace to minimize store signal pickup.
The little awkward placing of the drivers Q25/26 was necessary to prevent the onset of ringing, when clipping without load, if mounted alongside the MJL21194's with a less effective layout.
CIRCUIT DESCRIPTION LTP/VAS:
The VAS stage is the best candidate for tweaking, as it combines big voltage gain with large swings.
After trying several circuits, the article "A New Amplifier etc.", by Samuel Groner caught my attention, as it shows a lot of benefits over other circuits, it also looked vaguely familiar. After looking through my old documentation, this proved to be true, a STAX power amp schematic from ca 1981 shows an identical circuit.
It is a symmetrical folded cascode circuit which combines high speed, symmetrical clipping and low distortion. The addition of Q14 and Q15 reduced the emitter-impedance of Q15/16, further reducing the distortion.
A level shifting stage between LTP and VAS is prevented by setting the midpoint (connection R29-R30) to 5V negative by U1.
The LTP needed very little changing, a constant current source Q9 was added supplying the voltage for the cascode stage Q2/5, which lowers common mode distortion further.
For low distortion, surprisingly, more elaborate measures such as Cross-quad or Cascomp input or even a Wilson current mirror were not necessary.
With a Wilson current mirror the offset will be zero with a good matched differential pair Q1/8, for distortion it made no difference. Lowest distortion was obtained by minimizing the voltage difference between the collectors of Q3 and Q6, this is set by D1 and R39, in combination with R53, correcting the offset. The current mirror is referenced to ground instead of the negative supply rail.
Compensation:
The amount of feedback available is determined by the compensation, which in turn affects the degree of distortion reduction that's possible.
This is handled by the combination of C10/11/38 and R21/22 giving a phase margin of 101 degrees at 1.5MHz and 70dB feedback at 10kHz.
Stability plot with 2-, 4- and 8Ohm load.
I have built several prints of this latest version, all giving the same performance. The MJL21194’s per triplet need to be of the same HFE to guaranty the correct functioning of the power limiter.
CIRCUIT DESCRIPTION ANALYSER:
The differential input circuit used was the result of a long search to minimize the distortion limit of the analyzer, every improvement made to the amplifier followed by a same effort for the analyzer. The best circuits with matched resistors does not have enough common mode rejection, this strange circuit has. The OPA1656, X1, kept the common mode signal zero.
The inverted oscillator signal, for which I use Victor’s circuits, is fed into the summing node of X6 via R14.
The DUT output is attenuated to the oscillator signal level and via R15 added.
The three NE5532’s amplify the difference of the DUT input and output signal, the distortion 1000X. Phase correction is done by C3 and potentiometers X7/8.
The 60dB amplified distortion signal is added to the input signal by R27/28 to obtain a signal suitable for use with REW.
I wish to thank Simon for his feedback and support in those years.
