Finally some work done in the layout.... would apreciate your comments.
The layout corresponds to the latest sch where I modified the ltp ccs and mirror.
The vas mirror was also modified.
Some caps where added and now the IPS works at 75Vdc while the output at 63Vdc.
The layout corresponds to the latest sch where I modified the ltp ccs and mirror.
The vas mirror was also modified.
Some caps where added and now the IPS works at 75Vdc while the output at 63Vdc.
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Well, besides the obvious supply traces, I am not sure the usual custom of doing a ground plane is necessary or even useful.
Larger traces mean less resistance, so after I finish a pcb design I go over the whole design again widening the traces I did, and sometimes filling the empty areas with copper from whatever is closer. So I end up with a large copper surface cut by 1 to 2mm "streets" or "rivers".
That allows different position or size for passive components, or even using SMDs or through-hole if you prefer.
When I started doing this I asked around to professional pcb designers, and there was nothing against that, on the contrary.
But maybe someone here has a different opinion here that I would love to listen to.
Larger traces mean less resistance, so after I finish a pcb design I go over the whole design again widening the traces I did, and sometimes filling the empty areas with copper from whatever is closer. So I end up with a large copper surface cut by 1 to 2mm "streets" or "rivers".
That allows different position or size for passive components, or even using SMDs or through-hole if you prefer.
When I started doing this I asked around to professional pcb designers, and there was nothing against that, on the contrary.
But maybe someone here has a different opinion here that I would love to listen to.
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