I don't want to stop your efforts or question your ability to solve differential equations but its probably easier to just look up the literature for this. In fact oscillator amplitude control is a nonlinear problem (optimum loop gain is level dependent) and hence cumbersome to attack analytically. I suggest you get a copy of "Schnelle Amplitudenregelung harmonischer Oszillatoren" by D. Meyer-Ebrecht (Philips research reports; supplements; 1974/6). That's the only reference I'm aware of which covers the problem in great detail and for various level detector topologies. Unfortunately (well, not for me) it's in German.
Typical THD figures for these don't go below 60 dBc or so.
Of the topologies I'm aware of it offers best rejection of level detector ripple and multiplier distortion (see B. Hofer, "A Comparison of Low Frequency RC Oscillator Topologies"). Also it avoids common-mode distortion in opamps, operates all frequency setting switches at ground potential and is easy to adjust for frequency.
There's a patent on this one if you want to look it up.
I think you mixed up a couple of figures--the System One and Bob's design surely go below -100 dB. But indeed the HP ain't that great.
Samuel
Some more references woth considering:
Fast Amplitude Stabilization of an RC Oscillator
Eric Vannerson, Kenneth C. Smith
IEEE Journal of Solid-State Circuits, Vol. SC-9, No. 4, pp. 176-179, August 1974
A low-distortion oscillator with fast amplitude stabilization
Eric Vannerson, Kenneth C. Smith
Int. J. Electronics, 1975, vol. 39, no. 4, pp. 465-472
Design Factors in a Programmable Distortion Measurement System
Richard C. Cabot
JAES Volume 32 Issue 12 pp. 964-983; December 1984
Samuel
Fast Amplitude Stabilization of an RC Oscillator
Eric Vannerson, Kenneth C. Smith
IEEE Journal of Solid-State Circuits, Vol. SC-9, No. 4, pp. 176-179, August 1974
A low-distortion oscillator with fast amplitude stabilization
Eric Vannerson, Kenneth C. Smith
Int. J. Electronics, 1975, vol. 39, no. 4, pp. 465-472
Design Factors in a Programmable Distortion Measurement System
Richard C. Cabot
JAES Volume 32 Issue 12 pp. 964-983; December 1984
Samuel
I have always believed that the state variable oscillator was the best for achieving low distortion and noise.
The agc is always the tricky part of an oscillator design. I have been fascinated with the agc problem since the days when I built an Eico Model 377 audio oscillator that used a tungsten lamp for agc. Later, I built an oscillator that employed a thermistor for agc. Still later, I used a JFET in the way that I believe HP pioneered, wherein they feed back a small portion of the drain signal to the gate to minimized JFET agc distortion. I use that in my analyzer's oscillator.
Bear in mind that at low frequencies there is a very distinct tradeoff between agc control signal distortion and oscillator settling time. Some oscillators actually have a switch for fast and slow performance, the latter offering lower distortion.
One-size-fits-all agc control signal low-pass filtering is non-optimal, and that is why there is some range switching of that in my oscillator.
Four-phase rectification is a nice thing to try, and is synergistic with the state variable oscillator topology, sine in-phase and quadrature versions of the signal are available.
Cheers,
Bob
About the MDAC hybrid
I did look up the patent. From what I understand does the patent describe a resistor network that is switchable with FET switches. I was a bit disappointed that it was so simple.
Now when I reflect on the hybrid issue, I remember that at the time of the AP-1 (~1985), were almost all boards in through hole technology. If you wanted to do something in surface mount technology, you often went with thick film hybrids. I am to young to have done this kind of design.
I did look up the patent. From what I understand does the patent describe a resistor network that is switchable with FET switches. I was a bit disappointed that it was so simple.
Now when I reflect on the hybrid issue, I remember that at the time of the AP-1 (~1985), were almost all boards in through hole technology. If you wanted to do something in surface mount technology, you often went with thick film hybrids. I am to young to have done this kind of design.
The oscillator with the tungsten lamp, built the HP company...
The JFET feedback is utilized all over the APS-1. HP8903 uses some IC for multiplication.
AP senses the error voltage and issues a speedup signal for faster locking, when the error is too large.
I beleive it is therefore both HP and AP uses some kind of sample and hold circuit, that charges the integrator for a fixed period of time for each oscillator cycle.
There has been a great progress in the digital domain since all these ciruicts where designed. I beleive the oscillator can be greatly improved by including some digital control of the circuitry.
APS-1 has some old 74xxx counters etc for CPU frequency control.
If we need digital frequency control, the correct place is in a CPLD or equivalent. But now we have plenty of gates, we can do all the control of the S&H circuitry etc from the CPLD.
I believe HP used some really scaring monostable multivibrators in the 8903.
Meyer-Ebrecht has shown that with an optimum sample-and-hold based regulator settling might be achieved within 1.5 (!) cycles--with theoretically zero control voltage ripple. In practice this can't be achieved due to second-order ripple limitations (and multiplier imperfections) but we still get impressive performance compared to rectifier-based level detectors.
Improved with which respect? Cost or performance?
A DSP-based leveling loop is intriguing at first but consider the speed requirements of the amplitude control loop--the response time should be in the order of one period which quickly rules out any DSP processing at frequencies above the audio range.
Samuel
Well, the basic circuit will probably not gain anything from new digital technology.
I see two aspects of digital control.
- Frequency control. The APS has some discrete logic counters etc.
- Timing of the S&H circuitry. This is not necessary, but if you have the frequency control, It is trivial to add the S&H control.
But I think I have to stop. It is more important to really build an oscillator.
I have some more questions about the design, that I will come back with later.
The AP S1 & 2 also have some custom DAC's for freq control that have an additional resistor on the chip that tracks in absolute value and tempco with the R/2R ladders. These were custom fabricated for AP by ADI.
I've looked at this years ago and developed a prototype reed relay digital freq control, but I didn't pursue it further, possibly with today's devices it might be doable.
jd
My thought for coarse frequency control is relay control.
The APS-1 has a circuitry for measuring the pulse time implemented in 74xx circuitry and feedback from the CPU.
My conclusion is that 74xx circuitry is old school and should be replaced with circuitry in a CPLD. I.e. do the coarse tuning with R&C, then do some fine tuning with a CPLD and a VCA, compare it to an inverted PLL. Instead of locking the phase, you lock the pulse time.
Yes, ADI did do a lot of circuitry in hybrid technology a few years ago, but this is tales I have heard about. Nowdays, my belief is that ADI only manufactures silicon chips.
By the way, reed relays, are these the best relays for this application, or will a US$2 signal relay do the work?
The APS-1 has a circuitry for measuring the pulse time implemented in 74xx circuitry and feedback from the CPU.
My conclusion is that 74xx circuitry is old school and should be replaced with circuitry in a CPLD. I.e. do the coarse tuning with R&C, then do some fine tuning with a CPLD and a VCA, compare it to an inverted PLL. Instead of locking the phase, you lock the pulse time.
Yes, ADI did do a lot of circuitry in hybrid technology a few years ago, but this is tales I have heard about. Nowdays, my belief is that ADI only manufactures silicon chips.
By the way, reed relays, are these the best relays for this application, or will a US$2 signal relay do the work?
That's conceptually been used in older Tektronix oscillators, see the Cabot reference I've given above. I presume it was not used in later AP products because it introduces amplitude and/or frequency noise.
I don't see any reason why a standard signal relay would not work. At least for the Rs it's perfectly feasible to use modern low-Ron solid-state switches; their small distortion contribution will be low-pass filtered by the integrators and they make the frequency transmission much smoother.
Samuel
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The concept is used in the APS-1, but it is a little bit hidden. The APS-1 measures the pulse time and during "High Accuracy" it has a software feedback, probably to a DAC. This is the same thing as a locked loop, but somewhat slower.
Which is the current state of the art?
Well, I have been reading the latest book from Douglas self, where he tested FET switches, and found them to be somewhat nonlinear, my beleif was that it was too much nonlinear.
I did a basic calculation of a switched RC network with the following parameters:
frequency range 20Hz - 200kHz
Frequency setting accuracy: 1%
This requires a minimum of 13 switches.
Design choices:
Top frequency capacitance: 200pF
This will give a minimum resistance of around 4kohm and a minimum resitance step of 70 ohm.
These switched resistors are present in both integrators, i.e. directly at the output of the oscillator.
The question is, how much will FET switches modulate the output signal, within or outside the requirements?.
The switches will also switch the capacitors.
IIRC in the high accuracy mode frequency is measured once and then corrected by setting the less significant bits once; there is no continuous frequency monitoring.
As far as I know the SYS-27xx uses the same mechanism. It is good enough for audio work--we don't need ppm frequency precision for any measurement.
Some notes on this one:
* Self tested mainly J111-based JFET switches. There are JFETs around with much lower Ron and hence proportionally lower distortion (see System One service manual).
* Self misses a simple linearisation technique for JFET switches which easily reduces distortion by an order of magnitude (see System One service manual).
* The 4066 gates Self tested are cheap, but not good. Compare them e.g. with the ADG1412 switches.
Samuel
Thanks for reminding me, I have some bias after spending some 10+ years doing RF design, where the ppms really count.
Well, the multiplier-based sin^2+cos^2 rectifier has definitely too much ripple to be usable without heavy filtering; and the AD633 itself is too noisy to fit in an ultra low THD+N generator as Q controlling element. Now I'm giving a try to the LM13700 and an ALC loop based on a track and hold/sample and hold scheme (a-la HP): it rocks! Output level is - almost - rock stable with a pretty low settling time, and THD seems to be in the -130/-140 dBc range @ +10dBV out with an operating Q of ~200; the main issue with this design is the broad band HF noise produced by the zero crossing detector and the associated pulse shapers driving the tracker/sampler - I'm still trying to get rid of it, but I hope a better layout will address it. After all I think the T&H/S&H peak detector is by far the best solution I've tried, and the most promising too; the LM13700 isn't probably known as the lowest 'low THD' device, but provided it's operated at a reasonably low level, it works pretty well.
Ciao,
L.
Ciao,
L.
You might find some inspiration on track-holds in this latest Jim Williams tour-de-force : 1ppm Settling Time Measurement. He managed to solve the control channel feed-through problems to his satisfaction but perhaps his dynamic range constraints were more stringent than yours. Certainly an LM13700 is way cheaper and simpler than his solution
Thanks for the reference: a little bit beyond my goals (and capabilities ), but it seems very interesting - I really love Jim's works and sense of humour - and the Williams's rule, too: always invert (except when you can't)
From the referenced AN:
Note 2. A historical note is in order. In early 1997, LTC’s DAC design group tasked the author to measure 16-bit DAC settling time. The result was published in July 1998 as Application Note 74, “Component and Measurement Advances Ensure 16-Bit DAC Settling Time”. Almost exactly 10 years later, the DAC group raised the ante, requesting 18-bit DAC settling time measurement. This constitutes 2 bits of resolution improvement per decade of author age. Since it was unclear how many decades the author (born 1948) had left, it was decided to double jump the performance requirement and attempt 20-bit resolution. In this way, even if the author is unavailable in 10 years, the DAC group will still get its remaining 2 bits.
Ciao,
L.
), but it seems very interesting - I really love Jim's works and sense of humour - and the Williams's rule, too: always invert (except when you can't) From the referenced AN:
Note 2. A historical note is in order. In early 1997, LTC’s DAC design group tasked the author to measure 16-bit DAC settling time. The result was published in July 1998 as Application Note 74, “Component and Measurement Advances Ensure 16-Bit DAC Settling Time”. Almost exactly 10 years later, the DAC group raised the ante, requesting 18-bit DAC settling time measurement. This constitutes 2 bits of resolution improvement per decade of author age. Since it was unclear how many decades the author (born 1948) had left, it was decided to double jump the performance requirement and attempt 20-bit resolution. In this way, even if the author is unavailable in 10 years, the DAC group will still get its remaining 2 bits.
Ciao,
L.
Good to hear your design makes progress!
Indeed a very good layout is needed. And don't forget that capacitive crosstalk is just half of the story. You need to minimise loop area as well. Local shunt regulators are very helpful.
I think you're mixing up a couple of things. The LM13700 is used for the multiplier and has nothing to do with the sample-and-hold/track-and-hold stages.
Samuel
Tracking notch filter
Some food for thought/bedtime reading:
http://www.linearaudio.nl/Miscellaneous/25404-Notch_filter_autotunes_for_audio_applications_pdf.pdf
jd
Some food for thought/bedtime reading:
http://www.linearaudio.nl/Miscellaneous/25404-Notch_filter_autotunes_for_audio_applications_pdf.pdf
jd
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