F5X -- the EUVL Approach - The Build Thread

4.4mA front end bias, in itself, is fine.

But since I expect you to get more bias current then Dave (who has the right value compared to theory), something is NOT right with your current PCB.
I have no idea what you have on your PCB and what not, it is impossible for me, or anyone, to do remote debugging for you.
For example if your outputs are connected to Gnd then the 55R feedback resistors are in parallel with the 11R, and your degen is then not 11R, but more like 9R1.

You have enough JFETs, so you can first test a JFET of roughly the same Idss offline and convince yourself what Id you should get with 11R degen.
And then you should go back to your PCB and find out if there are any discrepancies.

Have a go first.


Patrick
 
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The PCB is stuffed exactly according to Dave's careful instructions in this thread. Everything is in there according to F5X BOM including protection circuit, but not output devices, cascode circuit, and mute PCB. Probably exactly the same components as other 15+ F5X builders will be using soon (or already did)...
Inputs, but not outputs, are grounded.
I measure 10R5 over the 11R blocks, but do not recall the values measured for the individual matched 33R resistors used here.

Of course I can measure similar FETs with 11R degen - and will do so.
:hohoho:
 
The attached is the Id vs. Vgs measurement of a 2SK170BL with 7.9mA Idss from my own collection.
The measurement was made using calibrated equipment (0.1% reference resistors, etc.)

I have checked the measurement data myself to find out what Id one should get for 11R degeneration.
The result is 5.85mA, giving a Vgs of -64.2mA.

I am 99% sure there is nothing wrong with the PCB layout, since 3 people have built fully working amps with them.
I cannot rule out individual board errors for your GB boards, since I have never seen them, and they didn't come from us.
But then it would not be so difficult to spot. And Dave used the same boards.

Perhaps you could also check your Idss and Yfs measurements.


Patrick
 

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Thank you for taking the time to look at it. I do agree with your estimate.
Below is the experimental curve (measured, black) and 11R degenerated curve (calculated, blue) for one of the 7.9 mA K170 actually on the PCB.
The calculated Idss after 11R degeneration is 5.75 mA and the difference from your result (0.1mA) may well be accounted for by different Yfs between our K170's.

I'm sure that there is nothing wrong with the boards and I did take much care in stuffing these. Whatever the reason for the discrepancy it seems very constant as I basically get the exact same readings in all 8 sections. So unlikely to be a stupid solder bridge or something like this.

As far as I can see the only difference between Dave and my PCB's is that I have in the protection circuit.

Of course I will also have to check the absolute accuracy of my Id/Yfs measurements.
 

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OK, I will over the next few posts discuss an initial test procedure. The first test in the test procedure is to test the power supplies.

Pin 2 of U15 is at ground potential and pin 1 of u15 houlf be at +12V, pin 2 fo U14 should be at +24V when the power is on. pin 2 of U12 should be at 5V.

There should be less than 5-10mV of ripple on these rails.
 
Next you should test the Differential amplifier. We first need to test the differential performance of the amplifier. To do so put a 3V lithium battery across the terminals at pin 3,4 of P5 and 6. When you do so pin1 of U5 should be asserted high.

secondly when you tie 3+4 of P5/P6 together and touch +24 and Ground you should not see U5 asserted. in either case.
 
There are 4 configuration lines that are available to configure the relays.
These are
1) Start up delay. This line is low for a time after the power is applied to the protection board, then it goes high.
2) Trip. This is a latching output that latches high whenever the DC is detected on pins 3/4 of P5 and P6.
3) Off. This goes high when the amplifier is in off mode.
4) Standby. This bit goes high when the amplifier is in either standby or off mode.

The inputs that you select are put into an 4-input NOR gate controling the MOSFET. This means that whenever a selected input bit goes high the corresponding relay will have no current through it.

There are 4 configurable low power outputs that are controlled by a 2n7002 mosfet. there are also 2 high power configurable outputs that are controlled by a IRF610 MOSFET. There is a 3rd High power configuable output that turns off during switch off and a trip event to control a main power relay.

these configurations are controlled by wires across the sets of holes on either side of the PCB. I will upload a picture of which connects to which shortly.

Regards.
 
It should be, however to be sure could you please post a picture of the part here. If it is a TI part in a TSSOP14 it should be. I think that is just the marking code for them.

Edit, I Checked my order history and the part I ordered was the CD74HC4002PW. please still post the image.
 
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I have been asked again via PM for the F5X PCBs.

As mentioned before a number of times, we have an agreement with the forum that they have exclusive rights to the PCBs.
Under that agreement, we may only supply the PCBs as part of a complete project (Batch 1 & 2, already closed).
As long as the forum has not given up its exclusive rights, you should contact them (Variac or Jason) for the availability of the boards.
I am not a member of the forum organisers, so I cannot, and will not, speak for them.

In any case, the Gerber files will not be made public.
I owe it to the person who spent a few hundred hours on it.
He does not agree to giving them away and seeing them later on Ebay with uncontrolled quality.

If the forum does not want to make them available anymore, for whatever reasons, then we will.
Assuming of course that we have an open statement from the forum.


Thank you for your interest,
Patrick
 
Here is as promised a connection diagram for the Protection PCB configuration switches.
To have the relay terminals OC when a control signal is asserted put a wire across the pins in the on column. Put a wire in the foo column everywhere else.

OFF is asserted when the amplifier is in off mode
SBY is asserted when the amplifier is in standby mode
TRP is asserted after a fault has occurred.
SUD is asserted while the protection board is turning on.
Regards.

Edit: almost forgot to attach the file
 

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