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Old 27th January 2012, 08:57 AM   #311
Previously: Kuei Yang Wang
 
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Hi,

Quote:
Originally Posted by revintage View Post
Is there no negative effect of that the 1541 hits the roof/clips at about, in theory, the same time as the negative side(Ug=0V) of the 6072?
Let us think about this a little, shall we?

The TDA1541 will swing between 0ma and -4mA output current, with a "digital silence" centre-point of -2mA.

So with a 33 Ohm I/V conversion resistor the output of the TDA1541 and thus the gate voltage of the 6072A will swing between 0mV and -132mV, with a centre-point of -66mV.

Now we MAY have a miniscule grid current flowing with Vgk = 0V, however, the gridvoltage can never become positive, so no appreciable grid current will happen.

This approach ONLY works for the TDA1541/TDA1541A and no other DAC known to me and ONLY if the output current offset is NOT compensated. It is not a generic Circuit applicable to a wide range of DAC's.

Ciao T
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Old 27th January 2012, 09:25 AM   #312
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Hey T,

As I said they will "clip" at the same time. Actually it will work for the ancient TDA1540 too(joke).

I was more thinking of any unlinear effects when biasing a tube so close to Ug=0V. I have actually seen a few russian tubes in Klausmobiles tests beginning to draw gridcurrent just above Ug=0V. So letīs stay away from them.......
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Old 27th January 2012, 10:17 AM   #313
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Quote:
Originally Posted by ThorstenL View Post

So I'd have the TL431 with around 150 milliOhm Z-Out bypassed by 2,200uF with 66 milliOhm ESR (@ ~ 100KHz), which is bypassed with 470uF with 15 milliohm ESR (@ ~ 300KHz) which is then bypassed by 20uF Ceramic with around 5 milliohm ESR (@ ~ 1MHz) and the 1uF 0603 ceramic with around 30 milliohm (@ ~ 15MHz)...
I've found a HP 4194A to play with and a 47uF case D polymer in combination with a few comparatively low value ceramics is looking very nice when it comes to impedance flatness atleast up to 40Mhz wich is the upper measurement limit of the analyzer. (I've only done some trial measurements thus far making sure the calibration is decent, not added any DC bias)

Since it's easier to make the impedance overal flat if it magnitude is kept in the region of 100-200mohm this is because the inductive behavior of the regulator at high frequency gets more damped if it has a larger resistive part in its complex output impedance. This is also helped by capacitors not having extremely low esr or high parasitic inductance. Which also helps in reducing the Q factor's of the many different tank circuits that is formed by them, the regulator and the many parasitcs.

So the question becomes what to prefer, impedance flatness or lower overall level accepting greater ripple in the impedance magnitude response? Maybe its comparatively easy to answer for the 1541' since it (according to thorstenL) does not create much disturbance above the highest clockrate it sees anyway, if so maybe we can almost get rid of the ceramics altogether if we do a good enough job with the layout (and use modern smd polymer caps with lowish values).

Another aproach perhaps more suitable for the cmos circuits needed could be to try and tune the tank circuit for minimum impedance at the fundamental of the clock freqency and maybe its 3:rd 5:th, 7:th and even higher overtones.
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Old 27th January 2012, 11:23 AM   #314
Previously: Kuei Yang Wang
 
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Hi,

Quote:
Originally Posted by revintage View Post
As I said they will "clip" at the same time. Actually it will work for the ancient TDA1540 too(joke).
Well, I would not call it clipping. Also, the source impedance is very low. This limits any grid current effects. Yes, TDA1540 is also applicable. In this case oversampling must be retained though.

Quote:
Originally Posted by revintage View Post
I was more thinking of any unlinear effects when biasing a tube so close to Ug=0V. I have actually seen a few russian tubes in Klausmobiles tests beginning to draw gridcurrent just above Ug=0V. So letīs stay away from them.......
But we do not go above 0V and we can look at it from another angle.

By using essentially zero bias (the -66mV will provide a minimal bias, but MINIMAL) we operate the tube in the most linear region (look at Rp vs. I and u vs. I), plus we dispense with any biasing components, which especially in the case of cathode bias are not very inaudible.

In fact, I have become quite fond of near zero bias operation of tubes. I would not use if for commercial designs, as there is enough variation in production tubes that some may just not work, but for a DIY project it makes an immense amount of sense...

It allows us to draw down the circuit to the essential, that is an input voltage that never exceeds 0V and only swings negative, a triode, a source of anode current and an output capacitor.

Of course, we can do this only because our input voltage is very precisely and unambiguously defined, as said, it is a very specific solution, not a generic one.

Ciao T
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Old 27th January 2012, 12:23 PM   #315
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Quote:
Originally Posted by Tazzz View Post
Since it's easier to make the impedance overal flat if it magnitude is kept in the region of 100-200mohm this is because the inductive behavior of the regulator at high frequency gets more damped if it has a larger resistive part in its complex output impedance. This is also helped by capacitors not having extremely low esr or high parasitic inductance. Which also helps in reducing the Q factor's of the many different tank circuits that is formed by them, the regulator and the many parasitcs.
I did some LTSpice sims a couple of years ago that might interest you on this. I added a helper MOSFET to lower the impedance of the TL431:

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Old 27th January 2012, 12:41 PM   #316
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Sorry Thorsten, wrong of me. The examples actually drew grid current at negative voltages just below 0V. Took another look and current was in the ballpark of over 20uA, not much.......

And as you say, this close to 0V bias couldnīt be used elsewhere. Will be interesting to try out.
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Old 27th January 2012, 01:20 PM   #317
regal is offline regal  United States
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Quote:
Originally Posted by ThorstenL View Post
Hi,



Well, I would not call it clipping. Also, the source impedance is very low. This limits any grid current effects. Yes, TDA1540 is also applicable. In this case oversampling must be retained though.



But we do not go above 0V and we can look at it from another angle.

By using essentially zero bias (the -66mV will provide a minimal bias, but MINIMAL) we operate the tube in the most linear region (look at Rp vs. I and u vs. I), plus we dispense with any biasing components, which especially in the case of cathode bias are not very inaudible.

In fact, I have become quite fond of near zero bias operation of tubes. I would not use if for commercial designs, as there is enough variation in production tubes that some may just not work, but for a DIY project it makes an immense amount of sense...

It allows us to draw down the circuit to the essential, that is an input voltage that never exceeds 0V and only swings negative, a triode, a source of anode current and an output capacitor.

Of course, we can do this only because our input voltage is very precisely and unambiguously defined, as said, it is a very specific solution, not a generic one.

Ciao T
With the 33 ohms I/V, I believe the tube "sees a voltage source" with output impedance near 33ohm, so its a bit analogous to simpleSE driving class A2 (over 0V grid voltage) with mosfet help.

Also remember it was common to self bias 12Ax7's with the cathode tied to ground and using a large grid leak resistor the grid current developed a negative -0.1V or so, this was used in the old days.

I say anytime you can get rid of a cathode bypass cap, its worth trying.

But Ove's experiements show much lower 2H distortion simply by canceling the -2mA offset across a passive I/V using a simple jfet ccs. His page of actual measurements points toward the TDA1541 not favoring DC or AC developing betwen i-out and aground.
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Old 27th January 2012, 01:32 PM   #318
Previously: Kuei Yang Wang
 
Join Date: Nov 2002
Hi,

Quote:
Originally Posted by revintage View Post
The examples actually drew grid current at negative voltages just below 0V. Took another look and current was in the ballpark of over 20uA, not much.......
20uA would be an error of around 1% for 2mA Iout.

However, if you look at something like the 6N1P at 4mA (which is close to 6072A) or the 6N23 at 15mA (which is a 6922 or ECC88 etc.) you will see that gridcurrent remains < 5uA.

Quote:
Originally Posted by revintage View Post
And as you say, this close to 0V bias couldnīt be used elsewhere. Will be interesting to try out.
It is not precisely "0V Bias". Another application is an MC Cartridge input stage, even MM can be sucessful, as signal levels are only a few mV...

Ciao T
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Old 27th January 2012, 01:39 PM   #319
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Hey T,
Quote:
It is not precisely "0V Bias". Another application is an MC Cartridge input stage, even MM can be sucessful, as signal levels are only a few mV...
Read again, I said close to 0V bias. 66mV couldnīt be called anythinge else.

Last edited by revintage; 27th January 2012 at 01:41 PM.
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Old 27th January 2012, 01:41 PM   #320
Previously: Kuei Yang Wang
 
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Hi,

Quote:
Originally Posted by regal View Post
But Ove's experiements show much lower 2H distortion simply by canceling the -2mA offset across a passive I/V using a simple jfet ccs. His page of actual measurements points toward the TDA1541 not favoring DC or AC developing betwen i-out and aground.
Ove's experiment shows that for the value I/V resistor he selected AND for the use of the ECC88 (especially) he achieved a certain result.

It is probably not a good idea to carelessly generalise from this.

Also, personally I rarely worry about a bit of 2nd HD...

Ciao T
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