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Class D Switching Power Amplifiers and Power D/A conversion

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Old 12th May 2007, 02:13 PM   #11
fumac is offline fumac  China
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good design

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Old 12th May 2007, 02:34 PM   #12
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Hi Fumac!
If you like the idea, feel free to use it also in your professional amps. But I could imagine that your MCDs are already beyond that level...
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Old 12th May 2007, 02:43 PM   #13
fumac is offline fumac  China
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thanks a lot
i'll design a pcb to have test
and if ok , i 'll post something about it ,
waht do u think about this
use or not in my project, if use , i want to pay u for the design,
is ok?
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Old 12th May 2007, 02:48 PM   #14
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...not OK !
You don't need to pay you can use it for free.

Everything fine for me as long as nobody picks the idea and tries to patent under wrong name.
My ideas, which I am posting here are intended to be free for everybodies use.
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Old 12th May 2007, 02:58 PM   #15
fumac is offline fumac  China
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not to think about the pay this days
first ,i try it

a long talking in speaking english last night,
is helpfull to me , thank u very much

i 'm waiting for the next time,
i think ,my english will be better with talking with u

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Old 12th May 2007, 03:11 PM   #16
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Some more infos. The values in the gate drive are subject to change/adjustment. The dead time / cross conduction adjustment does also depend on VCC.
The given values are coming from my experiences with another driver IC and already had some cross conduction. Nice for low distorsions, not nice for losses.
May be it would be more save to start with Rg111=Rg112=Rg211=Rg212 = 27 Ohms and Vcc=12V.
And then adjust for everybodies personal taste.
Stepping up Vcc will reduce dead time as well as reducing Rg111, Rg112, Rg211, Rg212....
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Old 13th May 2007, 02:00 AM   #17
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Hi Markus,

Enclose your schematic in one piece PDF.....that would be much better than these 3 pictures........

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Old 14th May 2007, 04:50 PM   #18
Netlist is offline Netlist  Belgium
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You question deserves a separate thread an can be found here:
Schematics for ClassD amp


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Old 8th December 2007, 01:30 PM   #19
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First I have to thank all who supported me at DiyHifi.org!
Special thanks to classd4sure, eva & John Westlake.

DiyHifi.org disapeared from earth so I will try again to go for basic discussions in DIYaudio.

My headache regarding undesired shut downs and poor reliability of my self resonant babystep prototype was mostly caused by unsaint ringing and my be even active oscilations.

The ringing was especially triggered in hardswitching conditions by the snap back of the reverse recovery peak of the body diodes.
Optimizing the layout and X7R rail caps helps to shift the the ringing to higher frequency and better damping. Depending on the used MosFets and gate drive this can already be sufficient to get nice and clean wave forms.

With my fat MosFets I definitely needed additional RCL-snubbers between drain and source, whereas the L is formed by the geometry of the snubber.
==> Everything clean, all shapes fitting to theory.
Unfortunately unsaint fast, beyond all data sheet values and probably quite radiating between 100MHz and 1GHz.
I got reverse recovery peaks with di/dt between 2000...3000 A/us and the Uds sloping with 10kV/us at the same time. Out of spec for normal MosFets.

In the mean time I found a stunning simple method to adjust the resulting di/dt and dv/dt to any desired values. My preferred adjustment allows di/dt around 700A/us and dv/dt around 5kV/us.

Have a look to attached schematic (which does not show the MosFet parasitics).
I am using the L in the source path for a di/dt feedback which is reducing the Ugs at high di/dt and allowing to adjust any desired di/dt limitation. If you look to Ugs in this circuit then you will find a plateau, that is looking similar to a Miller plateau, but isn't. Different from the Miller plateau in this di/dt limiter the Ugs is kept low by the voltage drop across the L, not by Cdg. (But of course the Miller effect will also take place, directly after the di/dt plateau - as soon as Uds starts to slope. Depending on the di/dt & L & sourcepathpakageL & Cgs & drive impedance during the time of the Miller plateau you might see a superimposed dip of Ugs (caused by the voltage drop across the sourcepathpackage-L and becoming visible at the gate, because of Cgs). Depending on the choice of your values you can even cancel out this visible dip. But this is not a must.

In order make a well damped L I am simply running the source wires through small metal powder torroids.
Well the mini torroids which I have on hand would show 25nH, so I cut a gap with my metall saw in order to get 11nH.
Attached Files
File Type: pdf didt_lim.pdf (5.6 KB, 568 views)
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Old 8th December 2007, 02:36 PM   #20
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Here a screen shot during hard switching condition.
Please note the MosFets are heavy types.
150V/86A (IRFB4321).

Upper trace:
Uds of the lower MosFet, 50V per grid

Middle trace:
Ugs of the lower MosFet, 5V per grid

Lower trace:
di/dt in the source path of the lower MosFet, 900A/us per grid
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File Type: jpg didt_lim_08dec2007.jpg (75.6 KB, 2022 views)
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