ashade said:
Right.
Really? Rb in your case is 22k (R7), and Re is very small, but what is RL, which is in series with Re? You conveniently skipped that one in the equation. RL equals the input impedance of the next stage, in parallel with impedance of current source, the latter is infinite, hence RL = Rin of the gain stage. And that would be on the order of 200 ohms. Multiply this by (B + 1) - roughly 250 for your transistor - and you get ~50k. Obviously 22k is not at all large compared to 50k! 22k || 40k ~= 14k or so. (B = 200 is assumed).
You get 250 ohms for the gain stage as (B+1)Re1 || (B+1)Re2 || (resistances). This is quite approaximate as Q1 and Q2 are not going to be working in small signal conditions, but as the signal changes you get increase of the first term and decrease of the second, and vice versa, and also, the feedback resistors would be seen as Av times smaller. They are quite large, though, so even for large Av they are still on the order of hie. So ROUGHLY we can assume it's on the order of 250 ohms +- 6dB
The exact value can be calculated by calculating the approximate imput impedance of the output stage (in order to calculate Av of the gain stage) but this will be quite inaccurate, as small signal conditions are not going to be how these stages are used.
Still, this little exercise is enough to see what the approximate input impedances are. This is needed to calculate the proper values of the capacitors, and I also used it as an argument to demonstrate that your feedback resistor a couple of drawings back, was not well chosen.
Note:
If you look at my equations, input impedance between B and E, known as hie in the pi model, of the BJT is given as Vt/Ib, which is precisely equal Re(B+1) because Ie = Ib(B+1). Only that depends solely on biassing and temperature, you cannot neglect all the other components.
Removing R7 and C6 would pass the DC bias current through the source, which would create a DC offset across it. How bad that is depends on the source. For a dynamic microphone, it is NOT a good idea.
Values of the 200k and 330k resistors and resistors in emitters of Q1 and Q2 dictate DC bias, and to an extent, AC input impedance of the gain stage. 200k and 330k form a voltage divider. The voltage at the bases of Q1 and Q2 defines the saturation limit of the gain stage, hence it's maximum output swing. In other words, voltage on the emmiter resistors of Q1 and Q2 is subtracted from the power supply, what is left is your maximum output swing for that stage. In order to increase it, but leaving all other things the same, you need to lower the voltage lost on these resistors at DC, but keep the current through them the same. In other words, the resistors need to be lower. Still, to maintain good thermal stability, you still need ~ Vbe on each. This Vbe / Ie will give you their value.
In order to maintain ~Vbe on each resistor, given large B of Q1 and Q2, you need ~~2*Vbe between the base and emitter of Q1 and Q2 respectively. Since you know that Ib = Ie / (B+1), you now have enough data to calculate the replacements for the 200 and 330k resistors. However, because B has high tolerances, you are better advised to keep the voltage on bases of Q1 and Q2 approximately constant. This you can do by making the current through the resistors much larger than Ib, say 10x. This will in turn mean smaller resistors. However, the resistor between B and E you can reduce quite freely given it is in parallel to hie of the transistor, which is on the order of 1k or less. The resistor between output and base is best kept large, because it will be seen as Av times smaller due to feedback. Reducing the voltage drop on the emitter resistors to an acceptable minimum also means that the feedback resistor will be much larger than the resistor across B-e of Q1 (or Q2), which makes the condition that the feedback resistor be high, easyer to satisfy.
One thing which you may want to think about is the 3mA current source. Such elements do not exist in the real world and in reality this is at east one JFET or BJT with extra parts. This rises your total of transistors used to 6. You could easily have done a differential input stage amp with that, but if you want to continue using the same basic topology as you are now, you may want to look into using a compound transistor (Darlington or Sziklai pair) instead of Q1 and Q2, or doing a complementary follower on the input, or something else - with 6 transistors, you can do almost anything
A 200nA DC current on source is good or bad (for a dynamic mic or an electric guitar, for example)?
PS: things are getting clearer now, your last post really helped a lot. I'm planning to remove all capacitors on this circ and make another bias on the high gain state using one diode. Also, I'm planning to put emitter-followers between gain and output states, to minimize loading effects of the output state on the gain state. I think the main problem will be the DC offset at the output, but I'll think about later.
If you place a Vbe multiplier between the collector of U3 & U4, this might solve that problem and allow you to adjust the bias current through the outputs via a pot. As it is any more than a tiny amount of current through U3 & U4 will produce too much bias across your outputs. (providing the forward bias voltage of the diodes is higher than the Vbe of the output transistors) Of course you would be adding another transistor. Then you could replace the diodes with a resistor.
Then you could replace the diodes with a resistor.ashade said:
I think that your biasing is wrong because you now have less than the Vbe threshold voltage on the 15k resistors, hence both U3 and U4 are in cut-off. Time to review conditions for a BJT to be biassed into the active region? Also your 1k resistors in the emitters of U3 and U4 must be changed in accordance to the bias voltage on the bases to keep the same bias conditions, which I think I have written about 4 times already.
It would help somewhat if you did not change all your component asignments with every new iteration (U3 and U4 used to be the output transistors...), it gets really confusing this way.
200nA through a guitar pickup is no problem, in principle also not for a dynamic microphone. If you remove the source (disconnect mike), you get a rather nasty 'thump' as the input follower loses bias and it's DC conditions change. However, 10x that DC current can be aproblem for a sensitive dynamic mike because it mechanically 'biasses' the diaphragm (makes the mic work as a 'speaker') which can result in distortion. In any case, DC coupling in this instance is not a problem, the input impedance is fairly high and you can use a reliable foil cap, especially since you cannot DC couple the follower onto the next stage without getting either a DC offset on the output or distortion.
You still need to get the basic circuit right before you go embellishing it with extras!
CBS240 said:If you place a Vbe multiplier between the collector of U3 & U4, this might solve that problem...Then you could replace the diodes with a resistor.
'That' problem is due to wrong biassing of U3 and U4. 4 diodes could be put between U3 and U4 collectors and the two diodes present in the schematic now could be replaced by one resistor.
Still, given 6 transistors to work with, it would be a better idea to have the gain stage drive the output stage directly (without followers) as it did before, but put a decent follower (it comes down to replacing both U3 and U4 with a darlington pair each) in front, to get usable input impedance while being able to increase the gain stage bias current, in order to get better gain. Gain will still be limited by the feedback arrangement, but that could be separated into DC and AC paths to help this some.
no it's active.
DC Potential at u3 emitter: 14.998V; DC Potential at U3 base: 14.472;DC potential at u3 collector: 3.23 (not stable). Isn't it active mode??? For U4 the values are almost the same. Also, if they were in cuttoff, they wouldnt amplify the input signal about 100 times...
About the emitter followers, why do you think it's not good putting them between gain and output stages? I've read in a book they're good to minimize the load effects of the output on the gain stage...
do you think the gain stage input impedance is too low??
ashade said:
It is BARELY active mode. 14.998V at emitter means 0.002V across the 1k resistor, means Ie ~= 2uA! I'm sure one of your books also mentiones somewhere that for minimal thermal stability you need about Vt on the emitter resistor for this sort of biassing, preferably much more (about one Vbe)? You also need some sort of current to properly bias your output stage out of class B (however, given the noonlinearity of gain close to the Vbe threshold, you could alsmot call it class C). In order to get good distortion characteristics, it would be advisable to get at least half of the maximum Ib of the output transistors to be the bias current of the gain stage. For class A operation of the gain stage under all conditions, it would be advisable to have a bit more than maximum Ib of the output stage as the bias current. You also have to keep in mind that you need to calculate all that using minimum B for the outputs. Given a 4 ohm load, and assuming full output swing, you need 3.75A peak output current (of course, the output will never be able to swing that high due to Vbe losses and biassing losses in the gain stage, but better to be safe), assuming minimum B of 50 of the outputs, you get maximum Ib of the output as 75mA. If you let that much through the gain stage as DC bias, The transistors will dissipate too much (1.125W each) so we have to lower that. 200mW is at the edge of reliability for small transistors such as you are using, this limits the bias current to about 13mA. Assuming 1 x Vbe drop on the emitter resistors, for that current these resistors need to be 45 ohms - use 47 ohms as the closest standard value.
From 13mA bias current we calculate the required Ib, which is (assuming B=200) about 65uA. I will leave it to you to calculate the proper resistors from B to Vcc and from output to B, given 65uA base current and 2 x Vbe on the resistor between base and Vcc.
From 65uA we can calculate hie of the transistor as 384.6 ohms. Since you have two effectively in parallel, your input impedance will be AT MOST half that, ~192 ohms. In reality, you also get the feedback resistors divided by gain in parallel, making it even lower. That would definitely qualify as low input impedance, so your use of an input follower is waranted, but it needs a bit of developement.
I did not say it was not good. Just that given a limited number of parts, you may want to better utilize the transistors elsewhere.
Still, the approach is valid, with some modifications. For one, diodes used to get a 'thermaly variable' voltage drop to bias and thermally track the output stage, need to be moved in front of the additional follower stage, but something has to be in their place in order to help turn off the output transistors (for simplified models, this is not apparent, but would very quickly be obvious in a real amp with a reactive load such as a speaker). So, the diodes still need to be between the collectors of the gain stage transistors, except now you need to compensate 4xVbe so you need 4 diodes. This also means less output swing by an extra Vbe on each side (positive and negative). Using the above calculation for maximum base current of the output stage (now 4 transistors), you get a much lower bias currents for the gain stage, and much higher base and feedback resistors, and the input impedance will be much higher too. Unfortunately, you will have to deal with quite high impedances, which means that in the real world, you may have to deal with parasitic capacitances limiting HF response, and introducing phase shifts which could even lead to oscilations. Still, it may be worthwhile to try a simulation and see how the results compare.
No it wasn't. Now the stage is doubly temperature dependant instead of temperature stable. You need emitter resistors. You could put a diode in series with the resistor between base of gain stage transistors and Vcc, You would get stable bias (you still need resistors in the emitters!) but much more distortion.
so if I use 13mA, the max Ic swing of U3 will be 13mA peak, what means 13mA * 50 = 0.65A swing at the 4Ohm resistor, which means a maximum 2.6V swing at the output????
Hey look if it is right:
I want to bias U3 and U4 with Ic=13mA. So, at the base of U1, Ib = 13mA, right? At its emitter, assuming B=50 (I think it's too low, since the spice model uses 313 for this transistor), Ie = 0.66A. Assuming the same happens for U4 and U2, Ie = 0.66A for the emitter of U2 too. Since no DC current passes through the load and we have equal currents with same orientation, I conclude that from R5 and R6 must come no DC current, that is, the sum of them must be zero, right? And then, I don't know what to do to calculate their values...
PS: I remove the emitter followers
I have another question. Against bc559c datasheet , for Vce = 5V, Hfe = Ic/Ib = 3000 for Ic = 13mA at 25ºC; for 100ºC, it is 4000. Why are you using about 200??? Of couse our Vce ~ 10V, but I think 200 is an underestimation. And about the power, 200mW is the max power at about 100ºC. For a 60ºC operation, its max value is 350mW, another understimation.
No, try again
Why would the maximum swing be limited to the DC bias current in your design? It will only be 13mA at output = 0V, and most of it actually will be just flowing from C of U3 to C of U4 through the diodes. At the conditions you mantion above, you could say the amplifier leaves class A operation, as one transistor (U3 or U4) goes into cut-off, while the other continues with higher Ic. In reality, the A to B class transition is not that abrupt. This is because as one transistors current rises, the other's falls, for instance (and this is just for illustration, not very precise), when U3 current falls to 12mA, U4 current rises to 14mA, hence you have 2mA current difference for the base current of the output. In reality, the rise on one side and fall on the other are not exactly symetrical.
NO! Why do you keep 'forgetting' other parts which are obviously connected in the path of the current from U3 C to U4 C???
This is because you are 'forgetting' the diodes. We keep coming back to basics and we are going in circles.
What will bet the Ib of the output stage transistors? First we assume the B of all transistors and Vbe threshold of all transistors are the same. This gives us that at AC zero input, the output of the amp is exactly at 0V, so no current flows into the load.
The emitter currents of the output stage are (2x(Vdiode) - 2x(Vbe))/(2 x 0.2 ohms). From that you calculate how much current goes into the base of the NPN output transistor and out the base of the PNP output transistor. This calculation ia actually quite difficult to do and cannot be aproximated well by simple math. You would need an iterative process that would calculate the current balance between transistors and diodes given their PN junction characteristics. A decent approximation would be to use a Vbe voltage drop and calculate the dynamic resistance of the diode (Ut/Id) versus the dynamic resistance of the output transistor emitter (Ut/Ie). Substituting Ib + Id = const = bias current of U3 and U4, might give you a sensible approximation. However, in this case, it is so dependant on the actual diodes and transistors used, that it is simple to simulat it or even build that part of the circuit and measure!
I don't know where you are getting your models but the datasheets I have for your transistors clearly specify a minimum of 40 for MJE15031/31, although PNP is a bit higher in the range of currents of interest, also about 350 for BC559C but only up to a some tens of mA. I did use a somewhat pessimistic value, but consider that with minimum B=40 for the outputs, at full output, which is optimistically about Vcc - 2*Vbe = 13.6V, the output current is 3.4A, the base current is 85mA. At this current you are indeed likely to have B~=200-250 for samples of BC559C that are on the lower gain end (they are specified as B=350-800 in the Philips datasheet).
Given that 85mA is the peak current output, you may want to look at the power dissipation of the BC559C. You NEVER EVER design using the maximum limit values, but keep a safe distance. You would never design a car tire to be able to withstand EXACTLY the pressure you fill it with, the same applies here. BC559C, as tempting as it is given it's high B, is not exactly the right transistor for this. 100mA is it's maximum rating, usually you want to keep well below that. The 85mA at saturation is fine for a 4 ohm resistor load, but a speaker is NOT a resistor. It can be heavily reactive, and your peak current may end up in places where the transistor is nowhere near saturation, due to phase shift. As a result you have signifficantly higher power dissipation, and possibly, secondary breakdown. In fact, the BC559C being rated only 30V Vce max (and it has to withstand 2xVcc which is exactly 30V, no security factor at all!), and you using it close to the maximum current rating, secondary breakdown may be quite likely.
Regarding power dissipation, a good exercise is to calculate what temperature the die has when the maximum power dissipation for a given ambient T is reached. For instance, at 350mW and 60C, given a thermal resistance of die to ambient of 250K/W, the die is 87.5K warmer than ambient, at 147 deg C! This is WHY the limit is 350mW as maximum temperature is specified as 150C.
All of this is assuming the ambient temperature remains constant, while in reality, 'pockets' of the ambient with increasing temperature will be created because the transistors heat up their own ambient. It is also worth knowing that time to failure is inversely proportional with T^3. This means that for half dissipation, your transistor will last 8 times longer. Once again you NEVER design for maximum ratings taken as 'normal operating conditions' - these are reserved only for worst case scenarios.
just a question: most of the datasheets give the Hfe value based on Vce = 2V or 5V (sometimes Vce = 10V). For example, I have the datasheet for MJE15030 and it uses 2V values in the plots of Hfe X Ic. Under constant temperature, can I assume the the Hfe variation occurs ONLY due to Early Effect and use the normal active mode equations (without neglecting early effect) to predict the ratio Ic/Ib???
ashade,
after a long and to me useless discussion why don't you simply build your amp and measure what happens? This will lead you into much more experience than simply simulate it. You'll need a feeling for typical values which will show you, if there is something wrong or not with your circuit.
after a long and to me useless discussion why don't you simply build your amp and measure what happens? This will lead you into much more experience than simply simulate it. You'll need a feeling for typical values which will show you, if there is something wrong or not with your circuit.
No, 2 diodes!.
Ok, I think the way things are going I'm not gonna learn nothing. I think I'm going the wrong way. Because of this, I've built a new amp, much simpler than the last one, no diodes or caps, only simple stages present in my books. Please take a look and tell me what you think. I tryied to bias the output emitters at 3.75A, but no sucess, still lots of DC offset at the output (about 800mV). I'm trying to put collector of U2 at about 8.1V, because this will let the maximum swing to be safely between 15V .. 1.2V. Also, my doubt about datasheets continues... they use Vce = 2V for Hfe parameters, but in my circuit it'll be about 8.6V. Can I use the same values of I have to make a conversion??
Last question: if I plug a current mirror between collectors of U1 and U2, they will have always the same current and thus DC offset of the output will be zero????
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