NYCOne,
check out this thread for possible answers.
http://www.diyaudio.com/forums/pass-labs/75326-j-fet-zen-srpp.html
check out this thread for possible answers.
http://www.diyaudio.com/forums/pass-labs/75326-j-fet-zen-srpp.html
It was the Magic Marker that I used to obscure the part numbers.
NP:
A while ago you'd mentioned a six legger turning to an eight legger. Has that been sidelined?
I'm triply handicapped: I know very little about SRPP and IMC, I can barely follow the Aleph CS explanations, and I know nothing about electronics. Besides that, I'm having no trouble with my CXF5, CF5, F5, and J2...
I have to start building more speakers for these amps.
I have a LU version of the SRPP working in LTSpice. I figure LU's are cheaper than the R085's, so thats a good place to try to find understanding. Clearly still learning. Unfortunately, I lost my biggest helper this week. Cheers to Bill. Sorry, NYCOne, I thought I was helping. Good Luck with the J2. I hope you get it working.
The major theme of the thread I posted was stabilization of the DC bias point. It would seem, that the 6/8 legged creature is there to serve this purpose. In trying the LU version, I have realized what they were talking about. I did just as Nelson advised and added multiple small value resistors in between the two fets and have palyed with pulling from different points to change gain and bias. All this is of little help to you since you are using enhancement mode devices. I will post a schematic, but have little in the way of distortion numbers as I have yet to purchase a sound card to do measurements.
I just finished building my ARTA box as seen on this site:
HiFi Measurement
I'll have a chance to play with it this weekend.
I've said it before. The 6/8 legged beastie is just misdirection.
I don't want to say anything you want kept secret.
I'm a little perplexed (frustrated) by the biasing process of my J2 clone. I'm at a place where I can get by. I finished my ARTA box last night, I'll measure results shortly.
I just wish I understood more of what I'm doing instead of fiddling. Don't get me wrong, fiddling gets me great results, but it would be nice to have a real direction instead of a random walk.
The mu follower can be done a dozen ways without issue. I think ZM has
already posted the equivalent circuit. You want your basic constant current
source at DC and a negative resistance at AC. Another way to do it is the
Aleph circuit, which is fine if you are using a Mosfet as the current source.
If you are using a depletion mode part, you can self bias the current source
and center tap the power resistor to the output, but perhaps that's best
for another day. Time for my nap.
already posted the equivalent circuit. You want your basic constant current
source at DC and a negative resistance at AC. Another way to do it is the
Aleph circuit, which is fine if you are using a Mosfet as the current source.
If you are using a depletion mode part, you can self bias the current source
and center tap the power resistor to the output, but perhaps that's best
for another day. Time for my nap.
Nelson,
Sorry to be a PIA, but i cannot give up on figuring out the R085 SRPP. I have been reading and re-reading this thread along with the Nemesis thread and have gained what i think is some understanding. Based on the info you have spread out here and there, with Rs at 2, a bias current of 2-2.2A, and the gate being direct coupled, that means that you are biasing the Jfet at a Vgs of about +/-(-4)V. If this is true, i can start to play with the SRPP version of this amp. Does a combined +/-10R sound like a reasonable level for the drain resistance the lower Fet will see?
Sorry to be a PIA, but i cannot give up on figuring out the R085 SRPP. I have been reading and re-reading this thread along with the Nemesis thread and have gained what i think is some understanding. Based on the info you have spread out here and there, with Rs at 2, a bias current of 2-2.2A, and the gate being direct coupled, that means that you are biasing the Jfet at a Vgs of about +/-(-4)V. If this is true, i can start to play with the SRPP version of this amp. Does a combined +/-10R sound like a reasonable level for the drain resistance the lower Fet will see?
Buzzforb,
Your 2 Ohm total resistance of the two resistors will self bias SJDP at something
like 2 A - you are correct.
Like I said in:
http://www.diyaudio.com/forums/pass-labs/75326-j-fet-zen-srpp.html#post2150379
you will want to have the lower R of the two to be ~0.1 Ohm higher than the top R.
You actually can measure them in the circuit by the voltage drop, and reposition, if necessary.
But keep in mind the important point - the output of just two transistors amp will
be relatively high impedance, current output, no LF speaker damping (usable in some cases). For a low output impedance, the voltage FB will be necessary - something
like in J2, with the additional stages for an extra open loop gain to have a meaningful
FB factor.
The bottom transistor will see the load impedance of ~ double load impedance.
Your 2 Ohm total resistance of the two resistors will self bias SJDP at something
like 2 A - you are correct.
Like I said in:
http://www.diyaudio.com/forums/pass-labs/75326-j-fet-zen-srpp.html#post2150379
you will want to have the lower R of the two to be ~0.1 Ohm higher than the top R.
You actually can measure them in the circuit by the voltage drop, and reposition, if necessary.
But keep in mind the important point - the output of just two transistors amp will
be relatively high impedance, current output, no LF speaker damping (usable in some cases). For a low output impedance, the voltage FB will be necessary - something
like in J2, with the additional stages for an extra open loop gain to have a meaningful
FB factor.
The bottom transistor will see the load impedance of ~ double load impedance.
THanks Steven. I forgot about your post with the R suggestion. I did look at thelink you included, but assumed that the creator added the input stage because of the high Ciss of the fets involved. I did not consider the help of feedback with improving the LF dampening. A part of me is interested in a very pure amplifier, even if it is inefficient and lacking in some respects. If i get it working properly, I will develop it from there. I have an ESI Juli@ card coming to try distortion testing with. As far as LF dampening is concerned, I am waiting on some 170BL's to build an F4, which should take care of that problem. I will be adding a helper woofer to my FR and plan on driving it with the F4 tapped into whatever i decide to run the FR with.
Reading up on the SRPP some more and have a simple question. Tubes have plate resistance where as fets do not. Is this true all the time or is plate resistance a function of the triode/ohmic nature of tubes. Would a fet operated in the ohmic region of its response graph exhibit this same internal drain resistance?
<<Tubes have plate resistance where as fets do not. Is this true all the time?>>
ALL amplifying devices have "plate" resistance - it is called "output impedance".
Depending on the type of the device it will be "plate", or "drain", or "collector".
<<Would a fet operated in the ohmic region of its response graph exhibit
this same internal drain resistance?>>
Not the same. Changing Vgs in the FET ohmic region will change the resistance
(for AC and DC) of a "resistor", which is a good approximation for the FETs in
that region, but changing Vgc of a triode in its normal mode of opration will
not (generally speaking) materially change it's AC resistance (impedance).
ALL amplifying devices have "plate" resistance - it is called "output impedance".
Depending on the type of the device it will be "plate", or "drain", or "collector".
<<Would a fet operated in the ohmic region of its response graph exhibit
this same internal drain resistance?>>
Not the same. Changing Vgs in the FET ohmic region will change the resistance
(for AC and DC) of a "resistor", which is a good approximation for the FETs in
that region, but changing Vgc of a triode in its normal mode of opration will
not (generally speaking) materially change it's AC resistance (impedance).
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