Cheers Andrew, thought I had replied while at work but must of gotten distracted, I will see how it pans out with Petes amps.
* maybe fitting so to share their dissipation is better
Im not quite sure what this bit means Salas? would fitting 2 make them run cooler, sorry for my ignorance. I realise it would be simpler than trying to remove the 2.5s.
Ah so they WILL share the heat, now thats worth doing thanks! Yes i put them in like that so i could add heat sinks if they got very hot, I also went for 30w hoping they would never be stressed but they are 33 degrees c after 5 mins if the laser isnt lying.
I ordered another pair of 2.5s last night.
I was reading a post from Andrew saying the recommended voltage drop was 7 for this design, I have 12.35, I am guessing this is lost through heat via the circuit, is it the 12v regulator and is this a bit high? My transformer is dual 115v from RS, the mains is 241v so I guess this accounts for my increased raw DC. Also there is a very slight difference in my raw DC, +22.2 -22.3, would this effect the DC offset also? I am thinking of swapping the pair with 4mv round.
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the B1 and DC B1 use a jFET source Follower feeding a jFET CCS.
If the Follower passes exactly it's Idss when in the circuit, then the Vgs is exactly zero volts.
That's how one defines Idss.
The output offset is the Vgs. Thus an error in measuring the Idss, or allowing the transistors to operate at different temperatures will result in a non zero Vgs.
Note in all the above, supply voltage does not enter any of the conditions. It's all about how hot you force your two transistors to operate.
And I did not say that the Salas regs need to operate at a Vdiff of 7V.
I could not alledge that because I KNOW that mains voltage changes all the time and it would be impossible to maintain 7Vdiff with a variable input voltage.
If the Follower passes exactly it's Idss when in the circuit, then the Vgs is exactly zero volts.
That's how one defines Idss.
The output offset is the Vgs. Thus an error in measuring the Idss, or allowing the transistors to operate at different temperatures will result in a non zero Vgs.
Note in all the above, supply voltage does not enter any of the conditions. It's all about how hot you force your two transistors to operate.
And I did not say that the Salas regs need to operate at a Vdiff of 7V.
I could not alledge that because I KNOW that mains voltage changes all the time and it would be impossible to maintain 7Vdiff with a variable input voltage.
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Thanks Andrew I really appreciate you taking the time to try and help, unfortunately that goes right over my head, I will search this thread for Idss and try to grips with it. Would it be right to assume i put them in the wrong way for that pair assuming the numbers written on them where correct? Did I also read that both should be a negative value for them to have been installed the correct way round? Im guessing not as the negative pair is the one thats as you said, poor.
And I did not say that you said the regs NEED to operate at a Vdiff of 7v. I said you had stated that it was recommended, in post 5196 you said "This is well above the nominal 7Vdrop that is RECOMMENDED for this Salas Shunt Regulator" I realise I did leave out the word 'nominal' so apologies if ive taken it out of context. Thanks again for explaining some of the science, I will do some more reading later tonight.
Alan
That's very good of you, I really wish I could remember the numbers but I've binned the waste and my memory isn't that good. I was trying to work out with help if it was a mix up by me but the quad was in a different bag and I was really careful putting the parts in the right places. If I've understood it right I don't need 4 as they don't interact? I'm very happy with .2mv, if I take on board what Andrew says then the other channel is 'poor' I also realise that Salas says it 'in spec' of course I would love it to be closer to the .2. Will it work just replacing 2?
So im probably going to get roasted... As my transformer isnt wired properly it was very convenient for me to use the centre tap as my neg ref measuring the offset. Ive re measured using the centre pin output. This has made a difference but not a positive one. The channel that was +.2 is now -1.2mv, no drama, but the channel that was -4mv is now -5.8, so I guess this puts it outside of recommended spec, if only by a very small amount which could probably be ok on another dmm. I kind of expected the return pin to be referenced to the centre tap, proves i know nothing. Anyway im now happy i did put the quads in the right way and I will get in touch with Tea Bag. I do love diy audio.
Anyway im now happy i did put the quads in the right way and I will get in touch with Tea Bag. I do love diy audio.
...and before that, solder your joints on both sides!
Think I got off lightly their.
Both sides! That's going to make it harder to repair, well if it makes a difference. ..... thanks.
Hi all, gearing up for my build, thanks to Teabag for all his recent help.
I'm looking to do a 600ma build and am confused by the necessary size of heatsinks.
Would two of these be adequate?
EM/B/75 | Heatsink, 0.8K/W, 75 x 200 x 40mm | AAVID THERMALLOY
Thanks in advance,
Jim
I'm looking to do a 600ma build and am confused by the necessary size of heatsinks.
Would two of these be adequate?
EM/B/75 | Heatsink, 0.8K/W, 75 x 200 x 40mm | AAVID THERMALLOY
Thanks in advance,
Jim
What is your total dissipation? Current alone does not aswer that.
The Total dissipation with the output disconnected is Vin * Iccs
Two channels is double this.
eg.
22+22vac transformer gives Vin ~30V
Set Iccs to 600mA.
two channel total dissipation is ~ (30+30)V * 0.6A = 36W
delta Ts-a = Ptot * Rth s-a * DF ~ 36 * 0.8 * 1.4 = 40C
If the Ta is 30°C then the sink will sit at ~ 70°C when the output is disconnected.
The semiconductors survive (easily).
The Total dissipation with the output disconnected is Vin * Iccs
Two channels is double this.
eg.
22+22vac transformer gives Vin ~30V
Set Iccs to 600mA.
two channel total dissipation is ~ (30+30)V * 0.6A = 36W
delta Ts-a = Ptot * Rth s-a * DF ~ 36 * 0.8 * 1.4 = 40C
If the Ta is 30°C then the sink will sit at ~ 70°C when the output is disconnected.
The semiconductors survive (easily).