Philips UCD application note

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lumanauw said:
Hi, Chris,

Is it possible to make this UCD amp a follower (G=1)? In the schematic, do not use R12/R11, output is directly attached to inverting input (like opamp buffer, to base of Q2).

What will happened? Will it blow out or not oscilating at all?

Oscillation freq will be much lower depending on load impedance, and Q1-Q2 may will be blown up because of high feedback voltage.
 
IVX said:



I don't believe that such apocalypse will occur yet. :cannotbe:

I tried the single ended version with the feedback components removed it was pretty much a chaotic mess, I think Pafi's prediction is right on. First it really just slammed the output to the negative rail where it stuck, so I equalized the inverting/non inverting impedances and it oscillated very slowly, 50% duty cycle, output in full saturation (20V beyond the rails).

I haven't put much thought into it but there may be some chance at getting it to work if you configure it in non inverting mode, what do you think? Still, differential is vastly superior.
 
classd4sure said:


I tried the single ended version with the feedback components removed it was pretty much a chaotic mess, I think Pafi's prediction is right on. First it really just slammed the output to the negative rail where it stuck, so I equalized the inverting/non inverting impedances and it oscillated very slowly, 50% duty cycle, output in full saturation (20V beyond the rails).

I haven't put much thought into it but there may be some chance at getting it to work if you configure it in non inverting mode, what do you think? Still, differential is vastly superior.


I'm talking about Fsw. Really, differential is vastly superior, but it's other matter, if comparator ready to work well (e.g. comparator VDD>VDD power) , so no problem.
 
IVX!

Fosc is the freq where loop phase shift reaches -180 degrees. This phase shift comes from 3 parts: filter, feedback, delay of comparator+powerstage. If we have feadback=1, then only 2 parts left. Delay of comp+PS introduces a small, negative component (phi=360*delay*freq). Worst case: an unloaded LC filter already has -180 phase shift above resonance freq, so with no load fosc=fresonance. I dont have to tell what does this mean. (Theoretically unlimited output voltage.)

With load it is less catastrophic, but still bad. You can simulate it with an ideal comparator, delay, and LC filter!

This is exactly why post-filter feedback is not trivial to design.
 
Pafi said:
IVX!

Fosc is the freq where loop phase shift reaches -180 degrees. This phase shift comes from 3 parts: filter, feedback, delay of comparator+powerstage. If we have feadback=1, then only 2 parts left. Delay of comp+PS introduces a small, negative component (phi=360*delay*freq). Worst case: an unloaded LC filter already has -180 phase shift above resonance freq, so with no load fosc=fresonance. I dont have to tell what does this mean. (Theoretically unlimited output voltage.)

With load it is less catastrophic, but still bad. You can simulate it with an ideal comparator, delay, and LC filter!

This is exactly why post-filter feedback is not trivial to design.

Ok, let's make simulation, BTW, it's stable even completely without load.. AC analysis was done with stepping R1 from 8.2k to 200ohm. :cool:
 

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