My take on the F4 - advice needed

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ZM,

you can spare one 220u and one 2K2

I figured having a separate cap for each current source was the ultimate in terms of isolating them from each other. It might be overkill but I thought I might as well as there is plenty of free space on the PCB. Is this the case or am I just being silly?

If so, if I make them share the same supply (as per your schematic) should I increase the size of C2 as there will be a resaonable amount of current flowing through R11 (see currents listed in post #39)?

Do you have any thoughts on the dissipation figures I mentioned in post #39?


Thanks Zen Mod.
 
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Ok, here is the circuit I am hoping to go with. You will note that it uses a negative supply for constant current draw from the PSU. Things are looking good I think.

Current through input fet (J202) ~10mA, dissipation ~134mW. This is a 600mW device so I assume this is OK. No parallel jfets needed. Could I go with even higher current?

Current through Q1 ~10mA, dissipation ~210mW - a little high prehaps? Maybe a BD139 would be better?

Current through Q2 ~ 4mA, dissipation 6.2mW - good?

Suggestions and flames welcome!

210mW is no big deal for Q1 isn't big deal ; you can always put small clip-on hsink ; or just put BD and forget

J202 - ok , but I still don't like small xconductance ....
 
Current through input fet (J202) ~10mA, dissipation ~134mW. This is a 600mW device so I assume this is OK. No parallel jfets needed.
Dissipation isn't the only important thing. If the current is higher than Idss, then there will be positive gate-source voltage. I think this is bad because it causes gate current. ZM knows better about FETs than me, though. Maybe he will say?
What is the best practice for paralleling JFETs?
For JFETs or MOSFETs - It's normally a good idea to match the parts. If Vgs(on) is very different, then one FET will draw all the current and the other will draw none. I suggest checking the voltages across the MOSFET source resistors to make sure M1 and M2 are sharing their current about equally, same for M4 and M5.

It's not so important for your JFETs, because dissipation isn't a problem there; you just want maximum combined Idss.
 
Thank you both for your comments.

I actually should have said J203, which can handle a lot more current.

ZM, I know those parts you suggest are very good and well respected, but I have a thing about using parts that are out of production. I lose/destroy so many parts that I really need a guaranteed and cheap supply. Plus, if I ever want to reproduce the circuit for someone else it makes things easier. I also like to be able to bulk order parts from digikey and the idea of making beautiful music using a few 50c parts has an aesthetic appeal.

Anyway, I digress. Back to the circuit.

I simmed the circuit with a bipolar CCS for the input stage and an ZVN3310A mosfet. Current for the input stage is now 10mA and can't go much higher before I start to push the CCS dissipation too much (unless I switch to a BD139 or something).

Simulated distortion for the input stage has dropped by an order of magnitude down to 0.0009% at 2kHz with a 24v P-P swing! I think. Or was it 0.009%? I'm at work and can't check, but it was over 10x better than the original circuit.

I was amazed by the improvement. So I began looking at ways to improve things further. First thing was to replace the output CCS with ideal current sources. Distortion dropped by an order of magnitude again. Lesson? Output CCS could do with some work. So I increased the current through the driver transistor, decreased the base resistor to 221R and removed the E-C filter cap. A slight improvement.

Does anyone know any better CCS methods? I think I left the circuit last night at 1AM with .04% simulated TH distortion at 2kHz at the output with a 24V P-P swing.

I'm tempted to try using a bipolar CCS for the output stage, but I think the amp would need fully separate and independent CCSs for each output device due to the difficulties getting transistors to share current equally and the positive tempco. Probably a little more complicated than I want - everything has to fit on a 3.8" x 2.5" PCB.

Thoughts?

BTW, I know simmed distortion figures are nowhere like real life ones, but it's nice to see the relative improvements!
 
I simmed the circuit with a bipolar CCS for the input stage and an ZVN3310A mosfet...
Simulated distortion for the input stage has dropped by an order of magnitude
:):up:
First thing was to replace the output CCS with ideal current sources. Distortion dropped by an order of magnitude again.
I'm surprised. Is there much voltage swing on the collector of Q3?
I'm tempted to try using a bipolar CCS for the output stage, but I think the amp would need fully separate and independent CCSs for each output device due to the difficulties getting transistors to share current equally and the positive tempco.
No, current sharing will be fine with bipolars. The voltage across the emitter resisters is more than enough.
BTW, I know simmed distortion figures are nowhere like real life ones, but it's nice to see the relative improvements!
You might get more accurate results using Bob Cordell's SPICE models instead of the standard ones. There's a link in your F5 thread.

Good luck!
 
edit: Thanks Godfrey, will check all of that out tonight. Spice models especially sound interesting. My home internet connection has died so I might seem out of touch for a few days.

I lashed together the driver last night (fig 1).

First test was 20kHz sinewave. Yuck! (fig 2).

Oops, had a CCS bc550 in backwards. Replaced. Much better now (fig 3).

Still not great though - waveform is visibly distorted. Maybe I damaged something else having the CCS BJT backwards. Also the fet and the ccs bc550 are getting very very hot. Not sure if it is due to over current or oscillation. Will need to scope it out tonight and replace components.

Current probably a little high as I only had a 60R resistor for the CCS so it's running at 11mA.

But at least the rise and fall time is good (my sig gen rings a fair bit anyway, so I'm not worried about the ringing at the head of the waveform) (fig4).
 

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Sorry for all the posts everyone. Hopefullly someone out there is finding this interesting too.

Interesting. Been continuing my hunt to find the best CCS for a power follower and the bipolar one shown sims an order of magnitude better than the FET version.

EDIT: Actually, not that much, twice as good though, and even better at lower voltage swings

Not sure if this translates into real life, but surprising nonetheless given all parts are basic models. Does this seem right, is this expected?

Is this CCS ok as is or does it need other components to stabilise it and prevent oscillation?

Actually, adding a resistor to the collector of Q6 is a good thing for dissipation, though performance is reduced:)

I was thinking about using BC560 + BD139 + MJL21194 for a real life version - sound good?


Oh, by the way Godfrey, to answer your question about the voltage at Q3, the current schematic for the fet version and trace at the Q3 collector is shown below. Quite a bit of variation as you can see.
 

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But at least the rise and fall time is good (my sig gen rings a fair bit anyway, so I'm not worried about the ringing at the head of the waveform)
Unusual for a sig gen to mess up a square wave like that. You sure it's not just your scope probes being weird? Nice results, anyway. Output looks like input, even if input's not quite square.
Actually, adding a resistor to the collector of Q6 is a good thing for dissipation...
...and protection. When the amplifier's output voltage clips at the negative rail, Q4 and Q5 switch off and Q6 tries to draw very high current. A collector resistor can limit the collector current to a safe value. e.g. 220R for 150mA limit.

Good idea to swap 2n2219 with something like BD139, for current handling and dissipation. MJL21194 looks much better than 2N3055. MJL3281 maybe even better - higher speed and current gain, but looks like worse output compliance, so...:confused: Probably doesn't make any difference, both good.

I assume it's just a drawing mistake that the other resistor and the capacitor went missing from Q3's collector circuit. Without them, you'll get ripple.

btw, There's a nice transistor selection guide here on Greg's website
 
Godfrey,

Thanks for your reply. That guide is very handy!

Made some progress today, but also have some new problems.

I replaced the active parts in the buffer stage I last posted about yesterday with a new ZVN3310 and new BC550s. Works a treat now. No heating at 10mA and a near perfect 100kHz square wave output. Waveform is also no longer visibly distorted. Figure 1 shows the input and output sine wave at 20kHz - they overlap perfectly. Got the buffer stage sorted now I thought, moving onto the output stage.

Lashed up the output stage (fig 2) with IRFP240 and BC550, BD139 and MJL21194 for the CCS, which I happened to have on hand from my JLH experiments. The current schematic for today's test is also shown.

CCS seems to work OK. Current draw is a steady 1.5A or so. But something is wrong. I can't get a clean sine or square wave out of it at all. The gate waveform for the 240 is shown, and it's terrible. Output waveform is similar, perhaps even worse. Scope has trouble syncing.

Upped the gate stopper to 500R. Still no good. Not sure if I'm getting gate oscillations or something else somewhere in the CCS?

The output from the driver is absolutely perfect when not hooked to the output stage.

Any ideas?

Oh, and I though of something else. To get maximum performance from the darlington CCS I really should have a resistor from the base of Q6 to the emitter of Q5 to allow faster turn off, but I can't with this configuration unless I switch to a zener/led as the voltage reference. Do you think that might be a worthwhile change, or is the speed likely to be plenty enough for audio applications as is?
 

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Hi Greg
...the buffer stage... Works a treat now.
:up::)
Lashed up the output stage...
Yech!!! That looks like something I'd do. No, OK, mine would be worse, with everything held together with chocolate block connectors instead of solder, but still...:whacko: :dead:

That could be half the reason for the oscillation.

Some tips for layout etc:

a) High current wiring should be short, and definitely not arranged so you have big loops. Reason is a piece of wire has inductance. Longer is worse. A loop is much worse. See first pic below.

b) You need power supply decoupling caps on the amp PCB, close to the power devices. Erm, OK, no PCB, but you get the idea. Typical values are 100uF electrolytic in parallel with 100nF ceramic between the positive and negative rails. Yes, there's 10000uF or whatever in the power supply, but that's too far away to be useful at high frequencies (see point a above re long wires).

c) Gate stopper resistors should be very close to the FETs, with very short, if any, connecting wires.

d) By example, referring to the other two pics below:
In the "good" pic, there is no signal current flowing anywhere in the green "ground" wiring at the top of the pic. There is not even any DC current flowing to the left of (A). So input ground, speaker ground, and true earth are exactly the same voltage.

In the "bad" pic, the output signal current is flowing through the red part, so there is a voltage difference between the input ground (A) and the speaker ground (B). There is also a high DC current flowing through the blue part, which will cause some DC offset.
To get maximum performance from the darlington CCS I really should have a resistor from the base of Q6 to the emitter of Q5 to allow faster turn off,
No, Q3 can turn Q6 off plenty fast enough. What might be considered is a resistor from the bases of Q4 and Q5 to the negative rail. They're the ones with nothing to pull the bases down, and a high voltage swing across their collector-base capacitance. I wouldn't worry about it for now, though. It looks like the circuit is plenty fast enough, just not stable.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
btw, Fun fact: Either point-to point wiring (like what you're doing) or "dead-bug" style construction can give very good results (if they're done right), even better than PCBs. I've seen some ham radio stuff that looks like a dog's breakfast crammed into a plumbing fixture that works well into the GHz range, but wouldn't have a hope if it was built neatly on a PCB. Guess why?

Cheers - Godfrey
 

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Thanks Godfrey,

I was waiting for someone to question my layout - pretty terrible huh? I always find it amusing when something that looks like a preschooler put it together sounds so good - though not in this case, my luck has run out.

I won't show you some of my other output stage contraptions that are attached to the same heat sink :) Edit: Actually, I can handle being laughed at - see FET ccs picture :)

Thanks for your suggestions and figures. I will experiment with that today - will try some bypassing and shorten some leads.

As ZM suggested, it is tempting to stick to the FET ccs as it seems so much more forgiving of design. The fet based CCS shown (another terrible layout) works perfectly with the new driver stage. Looks like most, if not all, of my original problems were caused by the original driver stage's current capability. Despite this, I can't let this bipolar CCS defeat me :) If I can't build a stable CCS, what right do I have to be attempting amplifier design :)

For entertainment I've attached another such layout - that the keen eyes of someone famous on this forum will recognise :)

As to your PCB question - could it be because the higher dielectric constant of fibreglass makes nice little capacitors out of PCB traces?
 

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Hi Greg

I've seen some ham radio stuff that looks like a dog's breakfast crammed into a plumbing fixture that works well into the GHz range, but wouldn't have a hope if it was built neatly on a PCB.

Cheers - Godfrey

Godfrey--nice posting, and good tips.....

Re: Ham stuff, at 1.296 GHz and above....... You've obviously seen some of my microstrip and SMT construction..... Guilty, as charged! (But it does work!)

:)
 
Yay! Look how far we've come.

20kHz square (almost) waves.

I made a few changes as per your last post and look at the difference.

Oh, by the way, my sig gen has a 50R and 600R output. If I use the 600R output the little rings at the front of the waveform disappear completely. However the rise time isn't as impressive so I'll keep using the 50R output for now, and be comfortable knowing that audio waveforms will never rise this fast.

Another problem has become apparent though.

Adding the output stage to the driver stage is making the CCS for the driver stage slightly unstable. This manifests itself as a very slight blurring of the troughs of the waveform which is not there when it is hooked up by itself. How did I figure this out? Well I used the highly scientific method of touching everything with my fingers. When I touch the leads of the CCS transistors the waveform cleans up completely. I guess the slight loading, and possible shorting of the leads with a high resistance slows things down a bit.

So, now I have to ask myself whether this could still be a problem when I finally make PCBs. Would it be worth placing some small resistors at the base of all CCS transistors (output included) just to slow things down a bit and make the circuit unconditionally stable. Maybe something like 50-100R? Or, should I be able to get these CCSs stable as is with good PCB design?

EDIT: Actually, looking at some other designs I see that this should not be necessary. I might just have to bite the bullet and make some PCBs and see how it goes. Also, I have so many clip leads and wires that I'm probably having all sorts of problems with my test equipment.


Thanks again for all the advice. I can only hope you are getting some enjoyment out of seeing this project move along.
 

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