OllBoll,
Where did you find the shielding for your torroidal trafo please ?
I can't understand anything but I believe the hypex DLCP could be a better match if it allow to switch in the FGPA the internal AK dac chip to allow anothers outputs with 3 sets of I2S uf.l connectors (if it's possible with no noise ?) to try some others High-end DIY dacs...for each way....
Maybe is it alreadty possible with the actual DLCP ?
If it's possible from a technical view, could it be also a good marketing idea ? really think there is a place for both a SOTA Hypex pcb, with or without third party software able to be loaded (RePhase...). Could be a good challenge against MiniDsp to allow also serious I2S to Dac output for tweeter and medium. If you are more expensive, you should try to give if no loss of quality more versatile options !
very impressive box OllBoll.... how is travelling the digital corrected datas between the FIR and the Hypex board ? Is there a question of jitter here of do the Hypex isolate and resynchronous all the digitals inputs ?
cheers
Where did you find the shielding for your torroidal trafo please ?
I can't understand anything but I believe the hypex DLCP could be a better match if it allow to switch in the FGPA the internal AK dac chip to allow anothers outputs with 3 sets of I2S uf.l connectors (if it's possible with no noise ?) to try some others High-end DIY dacs...for each way....
Maybe is it alreadty possible with the actual DLCP ?
If it's possible from a technical view, could it be also a good marketing idea ? really think there is a place for both a SOTA Hypex pcb, with or without third party software able to be loaded (RePhase...). Could be a good challenge against MiniDsp to allow also serious I2S to Dac output for tweeter and medium. If you are more expensive, you should try to give if no loss of quality more versatile options !
very impressive box OllBoll.... how is travelling the digital corrected datas between the FIR and the Hypex board ? Is there a question of jitter here of do the Hypex isolate and resynchronous all the digitals inputs ?
cheers
The trafo was shielded when I bought it =) https://www.elfa.se/elfa3~se_sv/elfa/init.do?item=56-128-67&toc=18841
Dumb that I was I bought the 18V trafo instead of the 15V. But in the end the voltage will be ~ +- 24V which is withing the specs of the DLCP so I guess it is alright.
The DLCP is quite high end on the DACs already though, and the output stage is nice so I don't have to fiddle with balanced / unbalanced anymore. In my earlier setup I had planned on using the digital MiniDSP boards and own DACs but then the DLCP was cut in price and I bought it instead.
The MiniSHARC ( FIR board ) is first, since the FIR can be common on the whole channel, I run the 2-channel plugin.
Computer => SPDIF => MiniSHARC => AES/EBU => DLCP
So both the MiniSHARC and the DLCP reclock the signal but as I don't care much about latency it isn't an issue. If I cared about latency I wouldn't be using FIR to fix the low frequency roll off in the first place =)
Btw I always liked the sound of AK Dac chips...
Well done about the aes/ebu. Good isolator
What sort of signal goes out of the FIR on the AES/EBU : same as spidf ?
Maybe a drift can exist after the FIR between the MiniDSP device and the Hypex one... but the quality winned on the phase correction on the speakers do it a better trade off I assume !
What do they use at Hypex for the input on those AES/EBU, they reclock it ? independant clock or the one of the DAC chips (Masterclock) ?
how is the quality at he Minisharc input with spidf....here seems to be the weaker link...
notice than I have a poor understanding with all these concept, I ask myself the same question about spidf and a DAC... All those conf seems dependant of the first device quality (its streaming) despite of spidf input hardware mode with crystal in front of the streamer !
That's why I hesitate with async or slaved USB with a main Masterclock ! (I have 2 SB Duet and happy with the simplicity of the ergonomy ! But don't know too much about the output quality of its spidf even with tweaks !
thank you for your answers.
Well done about the aes/ebu. Good isolator
What sort of signal goes out of the FIR on the AES/EBU : same as spidf ?
Maybe a drift can exist after the FIR between the MiniDSP device and the Hypex one... but the quality winned on the phase correction on the speakers do it a better trade off I assume !
What do they use at Hypex for the input on those AES/EBU, they reclock it ? independant clock or the one of the DAC chips (Masterclock) ?
how is the quality at he Minisharc input with spidf....here seems to be the weaker link...
notice than I have a poor understanding with all these concept, I ask myself the same question about spidf and a DAC... All those conf seems dependant of the first device quality (its streaming) despite of spidf input hardware mode with crystal in front of the streamer !
That's why I hesitate with async or slaved USB with a main Masterclock ! (I have 2 SB Duet and happy with the simplicity of the ergonomy ! But don't know too much about the output quality of its spidf even with tweaks !
thank you for your answers.
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The SBs tend to be surprisingly good, and in general, spdif output isn't the problem - issues tend to be on the input side.
More often than not, the SB tweaks do more harm than good.
Btw I always liked the sound of AK Dac chips...
Well done about the aes/ebu. Good isolator
What sort of signal goes out of the FIR on the AES/EBU : same as spidf ?
Maybe a drift can exist after the FIR between the MiniDSP device and the Hypex one... but the quality winned on the phase correction on the speakers do it a better trade off I assume !
What do they use at Hypex for the input on those AES/EBU, they reclock it ? independant clock or the one of the DAC chips (Masterclock) ?
how is the quality at he Minisharc input with spidf....here seems to be the weaker link...
notice than I have a poor understanding with all these concept, I ask myself the same question about spidf and a DAC... All those conf seems dependant of the first device quality (its streaming) despite of spidf input hardware mode with crystal in front of the streamer !
That's why I hesitate with async or slaved USB with a main Masterclock ! (I have 2 SB Duet and happy with the simplicity of the ergonomy ! But don't know too much about the output quality of its spidf even with tweaks !
thank you for your answers.
The phase correction is all digital, and the transfer is kept digital form the MiniSHARC to the DLCP so there is no lossy transfer. It is all bit perfect ( apart from the actual FIR ). Both of them reclock so the trade off for the correctness is added latency. Latency isn't a problem for me though so I gladly do that trade off.
With reclocks then they do this: They buffer up a few samples, guess the original sampling frequency and then output a new signal from an internal clock so there are no jitter errors anymore. Any jitter smaller than the length of the buffer is eaten up. The cost is that we add latency which equals the length of the buffer. If we for example have a 50 Samples long buffer @ 48 khz that equals 1 ms latency if I have my math right.
OllBoll,
You mean than the transfer is maid like a tcp/ip protocol ? No loss because buffer then reclock and sent again with packetrs and accurate clock ?! (i mean packets have no drift which can be heard by ears because no loss ?! before re-sent its , because are re-assembled after?).
My understanding is the FIR is not anymore a tcp/ip transport protocol like and there can be some drifting after it with clocks....
With the two concept of asyncrhonous clock and master clocks I would like to understand when we slight to packets to multiplexed "voltage/current" with loss (for the picture because all is "analogic: voltage & current I mean. (no anymore buffering packets) ? Is the Dac chip really the last weak link. My understanding is it is not then you go out to the tcip/ip protocol for digital transport (assuming the few distance we need then the buffers allow more than "very good margins" here.)
In two words : is there a packect transfer protocol between the MiniSharc and trhe Hypex or does this transfer protocol is no encapsuled anymore ? Latch enable ?
Try to understand, sorry if questions seems stupid
You mean than the transfer is maid like a tcp/ip protocol ? No loss because buffer then reclock and sent again with packetrs and accurate clock ?! (i mean packets have no drift which can be heard by ears because no loss ?! before re-sent its , because are re-assembled after?).
My understanding is the FIR is not anymore a tcp/ip transport protocol like and there can be some drifting after it with clocks....
With the two concept of asyncrhonous clock and master clocks I would like to understand when we slight to packets to multiplexed "voltage/current" with loss (for the picture because all is "analogic: voltage & current I mean. (no anymore buffering packets) ? Is the Dac chip really the last weak link. My understanding is it is not then you go out to the tcip/ip protocol for digital transport (assuming the few distance we need then the buffers allow more than "very good margins" here.)
In two words : is there a packect transfer protocol between the MiniSharc and trhe Hypex or does this transfer protocol is no encapsuled anymore ? Latch enable ?
Try to understand, sorry if questions seems stupid
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OllBoll,
You mean than the transfer is maid like a tcp/ip protocol ? No loss because buffer then reclock and sent again with packetrs and accurate clock ?! (i mean packets have no drift which can be heard by ears because no loss ?! before re-sent its , because are re-assembled after?).
My understanding is the FIR is not anymore a tcp/ip transport protocol like and there can be some drifting after it with clocks....
With the two concept of asyncrhonous clock and master clocks I would like to understand when we slight to packets to multiplexed "voltage/current" with loss (for the picture because all is "analogic: voltage & current I mean. (no anymore buffering packets) ? Is the Dac chip really the last weak link. My understanding is it is not then you go out to the tcip/ip protocol for digital transport (assuming the few distance we need then the buffers allow more than "very good margins" here.)
In two words : is there a packect transfer protocol between the MiniSharc and trhe Hypex or does this transfer protocol is no encapsuled anymore ? Latch enable ?
Try to understand, sorry if questions seems stupid
The only dumb questions as I see is when one doesn't really want to hear the answer, but as you seem interested I say ask away =)
Not really, but you can think of it rather as a real-time stream of UDP packages, but where you are sure that you won't have packet losses unless something is very wrong.
And yes, the DAC is the weak link here. Generally it's the conversions that are a problem in audio:
Digital => Analogue ( the DACs )
Analogue low level => Analogue speaker level ( amps )
Analogue speaker level => Actual sound ( speakers )
Where the weakest of the weak links is the speakers.
If you stay in the digital domain it is very easy to transfer the data bit perfect. It is why all digital audio transportation today is digital, we can add how many intermediate steps as we want without problems. We only pay in increased global latency.
Also, because anything that reclocks also buffers is why the SPDIF source doesn't have to be good. If it works without audible glitching then it works perfectly and cannot work better. So cheap SPDIF interfaces are nice with the DLCP =)
Hi Julf,
Agree with that, I just did light tweaks (but very earable) and stayed for the moment witht the bulk ps for the moment (since many years)
!Have you hints about the inputs ? I assume you talk about crystals quality here ? Treatment after frames reception ?!
@ ChrisPa : thanks fo rthe input. So it's really asynchronous and isolated. Understand now. Thanks.
As others have stated, the only important clock is the final audio conversion clock in the DAC. Everything else is resynchronized/recreated anyway, so jitter won't matter.
Are you sure about the pinout of the 4 pin analog outputs?
If it is as you have drawn in the picture, then it differs from the 4 pin analog inputs of nc400.
If that is the case it would also mean you could connect the purchased dps to ncore signal cable, the wrong way, since the connectors used are the same at both ends.
Just finished building a DLCP. Sounds fantastic with both vinyl through analogue input and digital signal direct. Have done no other corrections through Filter Designer apart from setting crossovers by ear and intuition.
Will start measuring my system, and wonder if any have tried measuring direct in HFD 3 beta using Umik with asio4all installed?
Will start measuring my system, and wonder if any have tried measuring direct in HFD 3 beta using Umik with asio4all installed?
I received my Hypex remote today but can not get it to work. I use 2 DLCP's for a 12channel preamp with a single input card.
I have checked that the IR light is beaming when i push a button on the remote control. So the battery should be ok. However nothing happens on the preamp when trying to remote control it.
When selecting the Hypex remote in the filter designer, it automatically switches back to OneForAll Remote after reboot. It seems like the software (filter designer 2.11 and a 1.23beta firmware) rejects or ignores the Hypex remote.
Have anyone else experienced this?
I have checked that the IR light is beaming when i push a button on the remote control. So the battery should be ok. However nothing happens on the preamp when trying to remote control it.
When selecting the Hypex remote in the filter designer, it automatically switches back to OneForAll Remote after reboot. It seems like the software (filter designer 2.11 and a 1.23beta firmware) rejects or ignores the Hypex remote.
Have anyone else experienced this?
I'm not using all 12 channels, but 6 is too few. Currently I am in the moving - measuring - calibrating phase. In stead of pics: Preliminary setup is JMLC1400/TAD2002, JMLC350/GPA288Alnico, JHorn/GPA515 and 2pcs AE TD18H+ in sealed enclosure pr. channel... makes 10 DSP channels.
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