How do you calculate impedance of a current source?

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udok wrote: The relation between jfet current and R between G and S is nonlinear...
Look at a diagram for I over V_GS and draw a line I = V_GS/R into the diagram. The crossing point define I.

that's fine, I understand that, thanks.

udok wrote:

Assume that Ic1 through T1 of the CCS is increased by dIc1.
The dIc1 causes a dU = dIc1 * R2. T2 sees this dU at its base and adjust its
collector current dIc2 by dU / rm (rm = 1/gm = 26mV / Ic2)
The collector of T2 sees the load Rc2 = R_jfet || R_BE1.
The voltage at collector of T2 goes negative by dIc2 * Rc2.
This in turn decreases T1 collector current...

rm is the same thing as re, the intrinsic emitter resistance, yes?

udok wrote:

R_BE1 is about rm ( 1 + Beta) or about 5k at 1 mA.

doesn't the value of R2 influence R_BE1, or rather the impedance between the base of T1 and ground as this is the load the collector of T2 sees, that and R_jfet in parallel?

udok wrote:

It is enought that the R_jfet >> R_BE1 for good DC performance.

But what about ac performance, is that much more complicated, you spoke earlier about negative impedance and oscillations. I have used a current source like this before and it did oscillate, I cured this by putting an RC filter in front of the base input of T2.

Cheers,

Gordon.
 
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re = alpha * rm; alpha = beta/(1+beta)

yes - i forgot R2, R2 is important, input impedance with R2 is (R2 + re)(1+beta) or about 150kOhm @ 1mA, beta=150

The feedback capactiance between C and B is very important as it lowers the impedance. think of an inverting amplifier: C_CB is the impedance from output to negative input...

The picture shows the equivalent small signal model:
 

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re = alpha * rm; alpha = beta/(1+beta)

For some reason I have never encountered rm, is there another symbol for it? It could be that I've just forgotten! Thank you for explaining, so dIc = dVin / rm ( where dVin is the change in voltage at the base & rm = 26/Ic, I think some books have stated that re = 26/Ic, which is a close approximation if beta is high as alpha ~ 1

udok wrote:
The feedback capactiance between C and B is very important as it lowers the impedance. think of an inverting amplifier: C_CB is the impedance from output to negative input...

yes as it is multiplied by the voltage gain of the circuit, the miller effect?

It is only 1p for the bc847, that's quite good I would think?

The picture shows the equivalent small signal model:

The difference in Ro in the two transistors, is this due to different collector currents?

Cheers Gordon.
 
Latest setup, see attached.

Results:

VM_1 = 1.007 V RMS, Vcc = 20.0 vdc, Vccs(DC) = 9.4 vdc, Iccs(DC) = 5.3mA.

Signal Frequency: VM_3 Zccs(ac)
100. 15.5mV. 6.50M
330. 14.38mV. 7.00M
1000. 14.03mV. 7.17M
3300. 18.40mV. 5.47M
10000. 41.74mV. 2.41M
20000. 79.60mV. 1.26M

I don't understand why the impedance at 100 Hz is lower than @ 330 Hz. Notably the voltage on VM_3 was unsteady during the 100 Hz test, so the figure of 15.5mV was an estimate of the average reading on the meter.

Initially there was a lot of HF noise on the output of the ne5534 (see photo) this was tamed with an 82p compensation cap between pins 5 & 8

I suspect that the HF noise is coming from the power rails via the Vref network, therefore this may need to be cleaned up as my bench PS outputs quite a bit of HF noise ( I find this odd as its linear, not smpsu )
 

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The 5534 should be rock solid stable at higher freq (gain=100), but low freq. can make trouble, it need a decoupling C (100nF).
Try a 100 R at the output and a small cap across the 100k too.
51 k is a bit on the high side for 5534a.
if you have trouble with the PS, try a LDO ( LM317 or similar), with short cables.
Place SW-1 on the other side, so that no long cable is picking up RF.
 
The 5534 should be rock solid stable at higher freq (gain=100), but low freq. can make trouble, it need a decoupling C (100nF).
Try a 100 R at the output and a small cap across the 100k too.
51 k is a bit on the high side for 5534a.
if you have trouble with the PS, try a LDO ( LM317 or similar), with short cables.
Place SW-1 on the other side, so that no long cable is picking up RF.

I forgot to put the decoupling caps in the schematic, but I did use them, 3 in fact; 1 across V+ & V- and 1 each between V+, V- and vref, all 100n disc ceramic. I will try your other suggestions though.

Also the capacitor C1 on the vref potential divider is a 2200uF electrolytic.

Thanks again,

Gordon.

NOTE: I'm going out for the afternoon with the kids, but hopefully I'll get the chance to try out your suggestions later today!
 
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As yet I haven't made any further progress with the CCS testing. Have been taking advantage of the beautiful weather in the last few days of the Easter break, with the wife and kids.

I have drafted a new schematic, thus far only on paper, with udoks latest suggestions, along with an improved ( cleaner, hopefully! ) Vcc & Vref source, using 2 LM317L.

I will post it as soon as I have it in digital format ( schematic capture ).

Gordon.
 
The weather is beautiful here in Austria too, the cherry trees are in full bloom here :)

A dual power supply (+15V and -15V) has some advantages, you then do not need the Vref.. and build the cirucit so that
other CCS configurations are possible too (simple emitter follower, or JFET CCS).
 
The weather is beautiful here in Austria too, the cherry trees are in full bloom here :)

A dual power supply (+15V and -15V) has some advantages, you then do not need the Vref.. and build the cirucit so that
other CCS configurations are possible too (simple emitter follower, or JFET CCS).

The weather continues to be beautiful here too, so I was outdoors again today.

A +/- 15 volt supply is probably a much more straightforward solution.

Was reading my favorite electronics book again this evening and came upon this:

Current mirror limitations due to early effect
One problem with the simple current mirror is that the output current varies a bit with changes in output voltage, I.e., the output impedance is not infinite. This is because of the slight variation of Vbe with collector voltage at a given current in Q2, due to the early effect; in other words, the curve of collector current vs collector emitter voltage at a fixed base-emitter voltage is not flat.

Pages 88-89, The Art of Electronics by Horowitz & Hill, 2nd Edition.

How does the collector voltage modulate Vbe, in other words, what is the Early effect? The Authors seem to assume that the reader already knows this as there is no further explanation given.
 
The Early effect manifests itself as finite output resistance at the collector of a transistor and is the result of the current gain of the transistor being a function of the collector-base voltage.
The collector characteristic curves of Figure 2.1 show that the collector current at a given base current increases with increased collector voltage. This means that the current gain of the transistor is increasing with collector voltage. This also means that there is an equivalent output resistance in the collector circuit of the transistor.

Page 19, Designing Audio Power Amplifiers by Bob Cordell.
The Early Effect
Early effect - Wikipedia, the free encyclopedia
 
In the transistor BC846 plot of Ic over V_CE (for constant Ib) the curves are not horizontal.
An ideal current source would have a horizontal line, as Ic does not change with V_CE.

The early effect is modelled by Ro1 in the small signal model i posted earlier.

You can greatly reduce the Early Effect by cascoding the current source transistor (or by using hig-voltage transistors).
In a cascode the CCS transistors sees a constant V_CE. This improves the high frequency performance too.
 

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Here you see the effect of a cascode on the output impedance:
The output impedance goes up from 5 MegaOhm to 1.4 GigaOhm
(a factor of 270)!
- At least in simulation - i would really like too see if you can measure this in reality too :)

(I use a LTSpice trick with R6: ac=1T means that the AC impedance of R6 is 1e12 Ohm for small signal analysis only....)
 

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Thanks again guys. The Cordell explanation is incredibly clear and succinct, if the rest of the book is presented that way I think I'll need to buy it.

It is the last day of the Easter holidays today and quite warm again, so will be going out with the family again. Tommorow the real work can begin in ernest. I expect I'll go with the symmetrical PS +/- 15V.

jackinnj wrote: Here's another idea from the TI datasheet-- will work to 125V -- using the TL783:

At first the relevance of this went right over my head. :rolleyes: But yes this could be another solution to the problem, I don't see why it wouldn't work with the lm317, etc, of which I have several to hand. Thanks.

Gordon.
 
Here you see the effect of a cascode on the output impedance:
The output impedance goes up from 5 MegaOhm to 1.4 GigaOhm
(a factor of 270)!
- At least in simulation - i would really like too see if you can measure this in reality too :)

(I use a LTSpice trick with R6: ac=1T means that the AC impedance of R6 is 1e12 Ohm for small signal analysis only....)

That is an incredible result with the cascode circuit. I seriously doubt that my instruments are up to such a delicate measurement, as it would involve the measurement of incredibly tiny voltages / currents, in fact could any equipment measure this assuming that it could actually be built to operate as in the simulation?



Here i have simulated a further simple CCS:
Zout = 5.2MegaOhm / 1.4 GigaOhm / 7.6 MegaOhm

Actually I'd have expected better of the third circuit, the simpler cascode one, though perhaps it is relatively superior to the simple 1 bjt current source



Gordon.
 
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I was hoping to see your DC measurment. It would confirm if my DC measurements and estimate of 200k to 300k is completely wrong or in the ballpark.

I am surprised that your early AC figures are so much better than what W.Jung has published.

Andrew, I have come up with a scheme to measure the DC resistance, see attachment. I made a somewhat crude measurement using an ammeter and voltmeter and got a figure of around 2.2M, but my equipment was at their very limits, so the error margin is enormous. That result was for the same 2 transistor 5mA CCS as in the ac measurements.
 

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Still not out yet as the Good Lady is getting laundry sorted out for the kids as they're returning to school tomorrow.

Anyway, AndrewT can you describe or better still, provide a schematic to show the method that you used to measure DC resistance and which type of CCS? If possible can you confirm what instruments that you used including relevant specifications, such as resolution and % error for DMM's, if it's not too much of a bother.

I'm keen to make comparisons between different methodologies, this thread could have the potential to turn into a publishable paper, though I'd need to fake my credentials, as I'm an EE degree dropout sadly :(

Looking forward to your reply Andrew,

Gordon.
 
I was reading through the thread again just now to refresh myself of everything discussed so far, my short term memory is diabolical! Anyway I was thinking about this post from Elvee, albeit an off topic one, but important to me personally.

Well, life isn't a bed of roses generally, which is kind of fortunate as it could become boring.
If you can survive its twists and turns, and still find energy to enjoy them, good for you....
Having some kind of passion or keen interest for something does certainly help

You are very right Elvee. The amplifier project that brought me here in the first place has very much been my salvation from the darkest realms of self pity! It feels good to be doing something ( useful? ) again and to work with other people, albeit it in the virtual sense, online.

This CCS measurement theme is turning into a project in itself albeit ultimately for the futherment of my electronics knowledge that I can then apply to the ongoing amplifier design project, which is going to be a pretty long term thing for me.

I'm glad that this appears to be of value to others too!

Gordon.
 
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