HI Herb,
I'm pretty excited to try this whole idea out. I would think that using a poor quality clock in the transport and then asking the cs8412 to re-create the clock from the SPDIF would be a bad solution. Better solution as you say would be to take the clock from the transport direct to digital filter.
Hopefully the XO clock would be sufficient to get an even better result. The XO3 is quite expensive.
I'm pretty excited to try this whole idea out. I would think that using a poor quality clock in the transport and then asking the cs8412 to re-create the clock from the SPDIF would be a bad solution. Better solution as you say would be to take the clock from the transport direct to digital filter.
Hopefully the XO clock would be sufficient to get an even better result. The XO3 is quite expensive.
Guys, you gave good advice!
Manfred, the SM5842 will live happily with a 16.xx MHz input if CKSLN is HIGH.
Herb and irgendjemand: Just taking the clock from the transport, inverting it twice (74HCu04 clock to pin 1, pin 2 to pin 3 and output from pin 4) and inputting to XTI on the SM5842 works well.
Sound: Just using the "cheap" crystal from the transport already gives some benefit in this new method: High's are cleaner. Not so sure about whether bass and mids improve, but will do serious listening later. Looks like I'll be placing my order for a 16.xxx XO!
Now I could still try reclocking the signals from SM5842 for further improvement!
Paul, if you are reading this thread, I would be interested to know whether the method using a VCXO secondary PLL is better than just a direct clock feed from the transport.
Thanks again!
Ryan
Dr.H said:
Ryan, the double inversion is only because of the connected reclocking system between dig.fi and PCMs. You could very well leave it out!
If Paul will agree or not:
a decent XO is less noisy than a decent (secundary) VCXO+PLL
because:
1. the tuning capacity-diode (which transforms an XO into a VCXO) degrade the Q of the Xtal, and
2. the tuning signal on these diodes adds noise.
Herb, can you explain please, what should have been left out? I am not sure if I get you right. Thanks!
Greetings, IJ.
irgendjemand said:
This has been a reply on the line:
Herb and irgendjemand: Just taking the clock from the transport, inverting it twice (74HCu04 clock to pin 1, pin 2 to pin 3 and output from pin 4) and inputting to XTI on the SM5842 works well. in post #23 of Dr.H
Good that you ask for it! After all, I do not understand his question there. I gues Dr.H looked at an 'old' circuit diagram of me in which I still used more ports of U18.
This question is not for you. The clock (from the transport) should be connected directly to the dig.fi (XTI of the SM5842 in our case).
Perhaps Dr.H could explain further his question in post #23?
Dr.H said:
I'm so sorry Dr.H, but I get the idea that you are less familiar with electronics. Moreover I should help you in the wrong direction!
For people as you there are kits for sale like the OX3.2 from TentLabs. Most kits are well documented and you could get support from the supplier which I cannot give you.......
Herb, I understand what you're saying, but since you are not an English speaker, you may not easily understand me.
Fortunately, schematics don't speak English...
I understand that the clock from the transport needs to be inverted for reclocking purposes and that you then invert it again prior to using at XTI.
As I said, in MY application, the transport's clock also needs to be inverted at least once, since without that, the system does not work.
Hope we're understanding each other...
This is the schematic I was hoping you'd publish.
Fortunately, schematics don't speak English...
I understand that the clock from the transport needs to be inverted for reclocking purposes and that you then invert it again prior to using at XTI.
As I said, in MY application, the transport's clock also needs to be inverted at least once, since without that, the system does not work.
Hope we're understanding each other...
This is the schematic I was hoping you'd publish.
Herb, one last thing:
If DIYAUDIO was only about buy this kit , buy that kit, etc etc, we'd all be much poorer by now;
There is a certain wonderfulness that comes from being able to craft your own stuff, hence DIY.
I come here to learn as well and the efforts of more experienced DIYer's like yourself is invaluable.
If DIYAUDIO was only about buy this kit , buy that kit, etc etc, we'd all be much poorer by now;
There is a certain wonderfulness that comes from being able to craft your own stuff, hence DIY.
I come here to learn as well and the efforts of more experienced DIYer's like yourself is invaluable.
Herb,
Let's keep this simple and DIY:
1. Have you looked at your schematic?
In it, you invert the clock twice prior to feeding it to XTI.
2. I knew of the schematic, but could not remember where I had seen it.
I was politely asking for you to post it again. Too much to ask?
3. In one of your earlier posts, you said:
" Ryan, the double inversion is only because of the connected reclocking system between dig.fi and PCMs. You could very well leave it out!"
I chose to try it double inverted as well. My choice heh?
Finally, please realise that this is DIYAUDIO.com, where a whole range of experiences, skills, abilities and languages are present. There is everything from Ph.D's in electronics to guys who think a resistor is a member of a new militia movement!
We are all going to need to be a bit patient to accomodate everyone. That way we all learn and have fun.
Let's keep this simple and DIY:
1. Have you looked at your schematic?
In it, you invert the clock twice prior to feeding it to XTI.
2. I knew of the schematic, but could not remember where I had seen it.
I was politely asking for you to post it again. Too much to ask?
3. In one of your earlier posts, you said:
" Ryan, the double inversion is only because of the connected reclocking system between dig.fi and PCMs. You could very well leave it out!"
I chose to try it double inverted as well. My choice heh?
Finally, please realise that this is DIYAUDIO.com, where a whole range of experiences, skills, abilities and languages are present. There is everything from Ph.D's in electronics to guys who think a resistor is a member of a new militia movement!
We are all going to need to be a bit patient to accomodate everyone. That way we all learn and have fun.
Dr.H said:
Yes, look at your mail.
It depends on which circuit diagram you mean. In time I published at least three different ones for different purposes
Yes..... because the question came after my 'buffering'-remark, so when you ask thereafter for a circuit diagram I could no imagine that you asked for something else then 'a buffer'......
Why so ....heh..? Is my answer not correct? Go, and do what you want!
Most of them behave themselfs like that. Once I asked you for a simple explanation, you did not answer at all! Here is anotherone: what are Ph.D's?
All the time I'm on diyAudio, I just learned one thing: the reclocking of the LE in a better way (from Paul) and I'm very greatfull for it as I have explained extensively. Moreover I posted my experiences with it, adding knowledge to the subject.
So that 'we all learn and have fun' is far from the truth.
Herb, thanks for your mail, sent you a reply.
Back to electronics: I will soon be using the clock from the transport for recloking all three DATA, LATCH ENABLE and CLOCK.
Will post results here.
PS
I did not see the "other question" you refer to. But here is a link to wikipedia for info on Ph.D's:
http://en.wikipedia.org/wiki/Doctor_of_Philosophy
Technically speaking, mine is a D.Phil. but that is entirely irrelevant to the subject at hand.
Back to electronics: I will soon be using the clock from the transport for recloking all three DATA, LATCH ENABLE and CLOCK.
Will post results here.
PS
I did not see the "other question" you refer to. But here is a link to wikipedia for info on Ph.D's:
http://en.wikipedia.org/wiki/Doctor_of_Philosophy
Technically speaking, mine is a D.Phil. but that is entirely irrelevant to the subject at hand.
PA0SU said:
Dear PA0SU,
I'm afraid that you are not yet done learning new things here
... You are still about to learn that a PCM63P-Y is a great chip, better then a "K", with or without LATCH re-clocking But much more important then this: Please don't under-estimate your own enormous contribution to many people here on diyaudio!! You already helped so many, includes myself. The improvements are fabulous!! Thank you so much for your contribution & please keep posting!
Your IJ (sometime you write IY… hmmmmm...
)
Transport ==> DAC
One could do a next step: If the Transport and the DAC are close together and the clock frequencies in transport and DAC are equal, the SPDIF could be left out.
I did it in another way (see the home page of my web site). I have build the DAC into the transport: the CD624 has a large empty box in which I have build a separate power supply. On top of this I have build the 'rest of the DAC' as presented in the attachement.
Luckily I had another PC-board of the TentDAC (as I call it) so that the layout did not give any problem.
The Philips transport CD624 outputs SPDIF-data as 'justified left with one bit delay'. The SM5847 accepts only 'justified right' so that I had to shift the data 15 bits to the right.
For a more sure reclocking (50 MHz oscilloscope needed!) I had to invert the clock for the shift register.
All together this is a rather tricky circuit!
Did it give a better audio performance than DACprincipe4? With me: NO!.
I post this only for completeness.
One could do a next step: If the Transport and the DAC are close together and the clock frequencies in transport and DAC are equal, the SPDIF could be left out.
I did it in another way (see the home page of my web site). I have build the DAC into the transport: the CD624 has a large empty box in which I have build a separate power supply. On top of this I have build the 'rest of the DAC' as presented in the attachement.
Luckily I had another PC-board of the TentDAC (as I call it) so that the layout did not give any problem.
The Philips transport CD624 outputs SPDIF-data as 'justified left with one bit delay'. The SM5847 accepts only 'justified right' so that I had to shift the data 15 bits to the right.
For a more sure reclocking (50 MHz oscilloscope needed!) I had to invert the clock for the shift register.
All together this is a rather tricky circuit!
Did it give a better audio performance than DACprincipe4? With me: NO!.
I post this only for completeness.
Tent-Link
Dear Herb,
Indeed, I am using the 'DACprincipe4' and it is excellent.
However, you wrote to Telstar (on the “Reclocking Balanced PCM63” thread) that Tent-Link can be the better way to go.
Well, I do understand that installing a XO in the DAC - near the PCMs, is a good think to do. Shorter way, etc. My questions to you however are:
1. Shell one give up in such a case about having a XO3.2 in the Transport? What about a SPDIF enhancer?
2. Or you mean – one shell install both high-quality XO(3.2), in both devices (Transport AND DAC)?
3. I remember you explaining once that a volium controlled XO is noisy. How will it then influance the all instalation?
Many thanks in advance.
IJ
PA0SU said:
Dear Herb,
Indeed, I am using the 'DACprincipe4' and it is excellent.
However, you wrote to Telstar (on the “Reclocking Balanced PCM63” thread) that Tent-Link can be the better way to go.
Well, I do understand that installing a XO in the DAC - near the PCMs, is a good think to do. Shorter way, etc. My questions to you however are:
1. Shell one give up in such a case about having a XO3.2 in the Transport? What about a SPDIF enhancer?
2. Or you mean – one shell install both high-quality XO(3.2), in both devices (Transport AND DAC)?
3. I remember you explaining once that a volium controlled XO is noisy. How will it then influance the all instalation?
Many thanks in advance.
IJ
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