Folded cascode headphone amp

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Lumba,
with no special purpose in mind. The circuits that interest me are phonoamps, buffers/lineamps and headphone amps, though. At a later date maybe a DAC output stage as well.
I always wondered why borbely choose such a low Id for his fets. Somewhere in my brain something says, that circuits with buffered output stages can have fets run with low Id, while transconductance circuits shall breed. (their fet input stage, resp.) I just don't know, why.
(I promise I'll try a non-push-pull input stage in the next incarnation of my fet/AD797 phono pre, really!) :eek:

Rüdiger
 
Rüdiger,
I will answer more comprehensively, give me some time, please. Just let me say that Jean Hiraga deemed 1mA sufficient, he did everything with extreme care using tube sound as reference. (Instead of fooling around with simulation software). Borbely has made very valuable investigations over the years (maybe thirty years).
 
Hi Rüdiger,
transistors do not have any specific optimal operating points, those need to be chosen in every situation, because of numerous conflicting parameters, different topologies and design goals.
Sometimes the current in the cascode should preferably not be the same through both devices. For instance, at one or two mA, the cascoding bipolar transistor does not reach its maximum frequency of operation. One of the advantages of the CFP is that these currents can be set separately.
Cascoding has many advantages as well, its original purpose was to extend the bandwidth in RF applications. It does that effectively despite of the fact that Vgd is not held constant, it happens due to the constant Vds (as Cgd is dependent on both Vds and Vgs, it does not behave like a two-terminal capacitor, which depends only on the voltage across it) and low gain.
Source resistors offer the simplest and least harmful linearizing method. Local negative feedback lowers the gain thus Cgd, extending the bandwidth, lowering distortions, noise and stabilizing in several ways (in example against thermal shock in roender`s amp).
JFETs have much smaller gain-bandwidth product than bipolars. As already stated, 2SK170 has high Gm (and thereby high intrinsic capacitances). Some people prefer 2SK117 for that matter, Yfs= 15mS vs.22mS, Crss=3pF vs. 6pF, Ciss=13pF vs.30pF. Now, why would we need high Ids?
Nevertheless, this reply will hardly satisfy you.
 
Lumba,
thanks for your reply. The main effect of cascoding (at least of cascoding a fet) is reducing its effective input capacitance. Of course, Vds is almost constant then as well. (not Vdg, how should that work?), since the fet in question has not do deal with the voltage wiggle that its current wiggle produces across the load (drain) resistor.
I still think, that both a very low Id as well as an Id close to IDSS (with some exceptions) doesn't provide the most linear region of output current (as can estimated from the transconductance curve). This would normally be more or less at half IDSS for a simple circuit. An appropriate chosen Rsource or a current source can set good values.
I think Borbely uses 2mA because it allows his circuits to operate over a wide range of IDSS, and it allows autobiased jfet-cascodes, since their Vgs has to be wide enough to allow an operating region above Vsat for the cascoded fets, which wouldn't be the case at higher currents.

Rüdiger
 
Rüdiger,
keeping as many variables as possible constant is a very good way to enhance linearity. Vds is kept constant mainly in order to prevent the most harmful capacitance, Cgd, from increasing and varying under dynamic conditions. This is (partially) done by the cascoding transistor, which also provides a beneficial isolation from the load. The cascoded device sees its very low input impedance instead. Obeying the same physical laws, the operation of the cascode implies all kind of devices, it was invented in the tube era. Suffering from voltage amplification, low gain reduces Cgd as well. Ids can be held constant preferably by a very high impedance CCS. A CFP would stabilize some further parameters. In my opinion, Ids should not be large in a cascoded high Gm JFET, an exploration of the sonic impact of different Ids and Vds would be interesting. It would have been possible for Borbely to choose larger Ids.
I did not say otherwise in my previous post, please read it again, I`m begging you.
 
Lumba Ogir said:

In my opinion, Ids should not be large in a cascoded high Gm JFET, an exploration of the sonic impact of different Ids and Vds would be interesting. It would have been possible for Borbely to choose larger Ids.

Yes, but why shouldn't it be large? I admit I never performed such a parametrized listening test, and it should be done. I agree on the other points of your last post.

Lumba Ogir said:

I did not say otherwise in my previous post, please read it again, I`m begging you.

It is not my primary intention to disagree wtih you nor to agree. Just to clear things as good as I can.

Rüdiger
 
Onvinyl said:


Yes, but why shouldn't it be large? I admit I never performed such a parametrized listening test, and it should be done. I agree on the other points of your last post.

I've done that, for a 9mA Idss K170BL at Id 2, 4 and 6mA.
Guess what, more current = better sound. No surprise here.
The test bead was my RMI-FC100 amplifier
 
roender, interesting. An Id of 6mA with a 9mA IDSS device absolutley makes sense to me.
In a phono input stage where the signal level is very low one could bias up to IDSS, I'd say. Or I'd try to find the zero tempco. But when I tried it in a voltage reg (a zerod FET feeding an resistor serving then as the voltage reference) the arrangement still had longer term drift even when I was very close to the optimum zero tempco value, so Lumba might have a point here (or I made a mistake somewhere, not so unlikely as well...)

Rüdiger
 
If one chooses JFET's with IDSS 3 mA and run them at 2 mA in the LTP, would they sound any different from 12 mA IDSS run at 8 mA?

I've tried using SK170's as active current sources on top of the LTP. I know you're going to say that it's no good because of temperature instability etc, but it sounds very good and measures and simulates extremely good. Even at low supply, the amp is totally invisible when run in RMAA. It doesn't sound sibilant and nasty like when I used current mirrors. DC-offset is stable at a couple of mA's. Voltage across the LTP drains is 0.1 mV in one channel and 1.1 mV in the other. I use no source resistors (RG1/RG2) like in the schematic because I've picked out closely matched pairs in the 4 mA range.

The noise is up a bit because of the 100R source resistors, but I want the open loop frequency response linear up to at least 10k, and I thought an open loop gain of 80 dB is a bit too much.
 

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Rüdiger,
it would be expressly inappropriate to ask you or anyone else to agree, actually, I can be wrong. I was reacting to a misinterpretation.
My first consideration is to find a linear operating range.

Nelson,
current sources/mirrors...
I`m noticing some inconsistency here. It`s the same high impedance load in the eyes of the FETs. They are not smarter than that.
 
Now I have two more versions to play with. A bipolar input and a CFP with JFET/bipolar input. I'm going to make a little shootout. First impressions:
- bipolar input: slightly warmer than neutral, mids are a bit recessed, lacks that typical JFET presence, soundstage a little bit vague
- CFP input: very full and deep sound, warm and with presence, it really sounds like a mix between the two transistors, might be a winner
- cascoded folded cascode SK170/SK246, brighter than neutral and because of that a little sharp on the ears, maybe better bass slam
- JFET input, very neutral presentation, maybe a little less details vs the cascoded JFET, not the same warmth and deapth as CFP
 

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